インテルのみ表示可能 — GUID: iga1401395383420
Ixiasoft
インテルのみ表示可能 — GUID: iga1401395383420
Ixiasoft
4.4.1. Simulation Levels
If you use the ModelSim* - インテル® FPGA エディション Simulator in a design that includes deep levels of hierarchy, turn off the Maintain hierarchy EDA tools option. This action prevents the Compiler to generate a large number of module instances in post-fit or post-map netlist, thus exceeding the ModelSim* - インテル® FPGA エディション instance limitation. To access this option, click Assignments > Settings > EDA Tool Settings > More Settings.
For information about ModelSim* - インテル® FPGA エディション Products, refer to the ModelSim* - インテル® FPGA エディション page in the Altera website.
For information about supported simulation levels, refer to the インテル® Quartus® Primeプロ・エディション Handbook Volume 3.