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1.1. System Requirements
1.2. Setting Up the Environment
1.3. Migrating Simulation from Acceleration Stack Version 1.0 to Version 1.1 and Greater
1.4. Simulating hello_afu in Client-Server Mode
1.5. Simulating an AFU in Regression Mode
1.6. AFU Examples
1.7. Troubleshooting
1.8. Document Revision History for Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start User Guide
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1.4.1.2. Design Declarations
RTL sources are specified in $OPAE_PLATFORM_ROOT/hw/samples/ <AFU example> /hw/rtl/filelist.txt, where <AFU example> is the example directory as shown in the figure above. In addition to SystemVerilog/VHDL, the AFU's JavaScript Object Notation (.json) file is also declared there. The AFU .json describes the interfaces required by the AFU. It also holds a UUID to identify the AFU when it is loaded on an FPGA.
The AFU declares that it expects the ccip_std_afu top-level interface by setting afu-top-interface to ccip_std_afu in hw/rtl/hello_afu.json. This is the base CCI-P interface with clocks, reset and CCI-P Rx/Tx structures. Other interface options are described in more advanced examples.
The AFU UUID is declared only once: in the .json file. The RTL loads the UUID from afu_json_info.vh, which is generated automatically by the OPAE scripts. The software loads the UUID from afu_json_info.h, which is generated by sw/Makefile.