Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start User Guide

ID 683200
日付 12/04/2018
Public

1.6. AFU Examples

表 3.  AFU ExamplesEach AFU example includes a detailed README file, providing an operational description and notes on how to simulate the design. For a fuller understanding of the simulation process, review the README file in each AFU example.
AFU Description
hello_mem_afu hello_mem_afu demonstrates an AFU that builds a simple state machine to access memory. The state machine is capable of several access patterns to local memory directly attached to FPGA pins, such as DDR4 DIMMs. This memory is distinct from the host memory accessed over CCI-P. The hello_mem_afu controller state machine is managed by the host through MMIO requests to CSRs.
hello_intr_afu hello_intr_afu demonstrates the user interrupt feature in ASE.
dma_afu 3 dma_afu demonstrates a DMA Basic Building Block for host to FPGA, FPGA to host and FPGA to FPGA memory transfers. When simulating this AFU, the buffer size used for DMA transfer is intentionally kept small to keep the simulation time reasonable.
nlb_mode_0 nlb_mode_0 is a CCI-P system demonstrating the memory copy test. The software application is located at $OPAE_PLATFORM_ROOT/sw/opae-<release_number>/sample/hello_fpga.c
注:

To simulate the NLB AFU in the regression flow, you must specify the path to the OPAE source, using the -b flag, as follows:

	$ sh regress.sh -a <afu dir> -r rtl_sim  
		-s < vcs|modelsim|questa > [-i <opae install path>] 
		-b <path to opae source dir>
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