JPEG-E-S: Baseline JPEG Encoder
このオファーについて
This IP core supports the Baseline Sequential DCT mode of the ISO/IEC 10918-1 standard. It implements an area-efficient, high-performance, hardware JPEG encoder with very low processing latency. The JPEG-E-S Encoder produces compressed JPEG images and the video payload for Motion-JPEG container formats. It accepts images with 8-bit color samples and up to four color components, in all widely-used color subsampling formats. The encoder processes one color sample per clock cycle, enabling it to compress multiple Full-HD channels even in low-cost FPGAs. One of the smallest JPEG encoders available, it synthesizes to about 3,500 ALMs. The core operates without any assistance from the host processors, and uses AXI-stream interfaces for pixel and stream data, and a 32-bit APB slave interface for registers access. FEATURES: Performs Baseline Sequential DCT JPEG encoding of images or video for ASICs or FPGAs, with small silicon area, high performance, and low latency. Standards Support ISO/IEC 10918-1 Standard Baseline Sequential DCT mode Encodes single-frame JPEG images and Motion JPEG payloads 8-bit per color samples Up to four color components; any image size up to 64k x 64k Handles all scan configurations and all JPEG formats APP, COM, and restart markers Programmable Huffman and Quantization tables Rate Control Options Image: Limits the size of each individual frame Video: Regulates bit rate over a number of input frames Interfaces AXI Streaming I/O data interfaces APB Control/Status interface Optional AHB wrapper with DMA capabilities Performance and Size One encoded sample per clock cycle Small silicon footprint (about 70k ASIC gates) Ease of Integration Automatic program-once/encode-many operation Simple, dedicated timestamps interface Included bit-accurate software model generates test vectors, expected results, and core programming values Optional Raster-to-Block Conversion with AXI or standard memory interface to the lines buffer Format Available as a netlist for ASICs or FPGAs
詳細
地域の対象範囲
ヨーロッパ、中東、アフリカ:
中東欧
独立国家共同体
中東、トルコ、アフリカ
北 EU 地域
西 EU 地域
南 EU 地域
中欧地域
中華人民共和国:
中華人民共和国
アジア、太平洋および日本:
台湾
その他のアジア
韓国
南アジア
東南アジア
日本
オーストラリア、ニュージーランド
アメリカ大陸:
北米
中南米
ユースケース
クラウド・コンピューティング
ストレージ
ファクトリー・オートメーション
印刷画像処理とオフィス・オートメーション
その他
スマート・ビルディング
業種
航空宇宙および防衛
自動車
製造
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Jpeg-e-s: Baseline Jpeg Encoder
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