I/O System Design (Legacy Course) (ODSW1107)

Course Description

Learn about I/O management features in the Quartus® II software v. 12.0, focusing on creating, modifying, & validating I/O-related assignments in the Pin Planner. An I/O planning flow is used to illustrate the I/O-related tasks required for a FPGA design. The early I/O planning flow is introduced as a method for creating & importing megafunctions & IP MegaCore® functions into the Pin Planner to generate a complete I/O port description for a design. Advanced I/O Timing, a feature that works with the TimeQuest Timing Analyzer, can generate enhanced timing reports that include board signal integrity metrics,to help make I/O assignment & board design decisions. NOTE: the section on creating pin assignments is still relevant but early planning flow has changed in recent Quartus II versions.

At Course Completion

You will be able to:

• Create a top-level design file from a project that includes validated reserved I/O pins & instantiated megafunctions or MegaCore functions without writing any HDL code
• Use this top-level design file as the basis for a project revision or a new project
• Create, manage, & verify I/O-related assignments
• Enable the Advanced I/O Timing option & configure board trace models
• Use signal integrity metrics from the Advanced I/O Timing option to design the PCB with good signal integrity

Skills Required

• Completion of “Using the Quartus II Software: An Introduction” OR a basic understanding of the FPGA design flow and the Quartus II software
• Basic understanding of timing analysis using the TimeQuest timing analyzer
• Knowledge of board-level signal integrity issues and design techniques

Prerequisites

We recommend completing the following courses:

• Timing Analyzer: Introduction to Timing Analysis
• Using the Intel® Quartus® Prime Standard Edition Software: An Introduction

Follow-on Courses

Upon completing this course, we recommend the following courses (in no particular order):

• Partial Reconfiguration with Arria 10 FPGAs

Related Courses

Below are the related courses you may be interested in:

• Migrating to the Quartus Prime Pro Edition Software

Applicable Training Curriculum

This course is part of the following Altera training curriculum:

• Advanced Hardware

Class Schedule

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Location	Dates	Price	Registration
On-line	Anytime	Free	Register Now

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