Introduction to High-Level Synthesis with Intel® FPGAs (IHLS2DAYPART1)

8 Hours Instructor-Led / Virtual Class Course

Course Description

In the class, you will learn how to use the Intel® HLS Compiler to synthesize, optimize, and verify design components for Intel FPGAs. We will first discuss the benefits of HLS then talk about features of the Intel HLS Compiler. You will learn how to use the compiler options, the generated reports, and the final generated files to integrate the IP within an Intel Quartus® project. Lastly you will learn how to effectively optimize your IP using the generated reports.

At Course Completion

You will be able to:

  • Use the Intel HLS Compiler to synthesize an Intel Quartus®-compatible component
  • View reports to debug & optimize the component
  • Co-simulate your HLS component using an RTL simulator with a software testbench
  • Integrate the HLS-generated component within an FPGA design
  • Understand the various interfaces available & be able to select the optimal one for various types of components
  • Effectively use various data types & math support features
  • Understand how the compiler pipelines loops

Skills Required

  • Basic understanding of the C programming language
  • Basic understanding of FPGAs and the Intel Quartus Development Environment

Applicable Training Curriculum

This course is part of the following Intel FPGA training curriculum:

Class Schedule

Result Showing 1

Virtual Classroom11/19/2019 - 11/20/2019$695Register Now