Insert Constraint Command (Shortcut Menu)

You access this command by right-clicking inside a Synopsys® Design Constraints File (.sdc) in the Quartus® Prime Text Editor, and then clicking Insert Constraint.

Allows you to insert timing constraints for the proper operation of your design directly into a .sdc file. You must constrain your design for the Timing Analyzer to produce an accurate timing analysis. The Timing Analyzer verifies that your design meets all specified timing constraints and reports the results in the Report pane and the Console. The Fitter uses timing constraint information to optimize placement of the design in the target device.