TMC-20006: Unregistered Partition Inputs


Found unregistered input ports in a design or user-partition leading to timing-critical interface paths. When an input port of a block is not directly driving a register, the combinational logic delay from the input port to the next synchronous element reduces the available slack. This condition makes interface timing closure dependent upon the instantiation context of the block.


To avoid interface timing path failures, ensure that all partition and design input ports are driving synchronous end-points, such as registers, DSPs, and RAMs.

Figure 1. Unregistered Partition Inputs




Tag Description
design-partition Design rule checks which check design partitions.

Device Family

  • Intel Agilex®
  • Intel Agilex®
  • Intel Agilex®
  • Intel®Stratix® 10
  • Intel®Arria® 10
  • Intel®Cyclone® 10 GX