Task and Report Windows (Pin Planner)

You open the Task and Report windows by clicking View > Task Window or ViewReport Window, respectively.

The Pin Planner Task window provides one-click access to execute common pin planning tasks. After clicking a pin planning task, you view and highlight the results in the Report window by selecting or deselecting I/O types. The Tasks window provides access to launch the following pin planning tasks:

Task Description
Run Analysis & Elaboration Elaborates your design to discover all nodes in the design and the target device I/O resources.
Early Pin Planning Allows you to define and plan I/O for design elements not yet included in your design.
Run I/O Assignment Analysis Verifies the legality of synthesized I/O pin assignments. If you have no yet run Quartus® Prime Analysis & Synthesis, only reserved nodes are analyzed.
Export Pin Assignments Generates a text file containing pin assignments in .csv or .tcl formats. You can use this file for scripting or text manipulation of pin assignments.
Change View Changes the perspective or detail in the Pin Planner device view. You can Show I/O Banks, Show VREF Groups, Show Edges, Show DQ/DQS Pins, Show Hard Memory Interface Pins, Show PCIe Hard IP Interface Pins, Show Clock Region Input Pins, Show I/O Modules.
Highlight Pins Highlights and selects various pin types in the current device view for visualization and assignment. You can highlight I/O Banks, VREF Groups, Edges, and various types of, Clock Pins, Memory Pins, and Differential Pins.
Report Pins Allows you to locate specific pins in the device view.