Intel FPGA RTE for OpenCL Standard Edition: Getting Started Guide
Intel FPGA RTE for OpenCL Standard Edition Getting Started Guide
The RTE is a subset of the Intel® FPGA Software Development Kit (SDK) for OpenCL1 . Unlike the SDK, which provides an environment that enables the development and deployment of OpenCL kernel programs, the RTE provides tools and runtime components that enable you to build and execute a host program, and execute precompiled OpenCL kernel programs on target accelerator boards.
OpenCL is a C-based open standard for the programming of heterogeneous parallel devices. For more information on the OpenCL Specification version 1.0, refer to the OpenCL Reference Pages. For detailed information on the OpenCL application programming interface (API) and programming language, refer to the OpenCL Specification version 1.0.
If you require OpenCL™ kernel development and deployment functionalities, download the Intel® FPGA SDK for OpenCL Standard Edition. Refer to the Intel FPGA SDK for OpenCL Standard Edition Getting Started Guide for more information.
Do not install the RTE and the SDK on the same host system.
Prerequisites for the Intel FPGA RTE for OpenCL Standard Edition
Hardware Requirements
Accelerator boards requirements:
- Acquire a Reference Platform from
Intel®
, or a Custom Platform from an
Intel®
preferred board vendor.
For more information, refer to the Intel FPGA SDK for OpenCL FPGA Platforms page on the Intel® FPGA website.
Deployment system requirements:
- You must have administrator privileges on the development system to install the necessary packages and drivers.
- The deployment system has at least 20 megabytes (MB) of free disk space for software installation.
- The deployment system has at least 128 MB of RAM. Tip: Refer to board vendor's documentation on the recommended system storage size.
The host system must be running one of the following supported operating systems:
- For a list of supported Windows and Linux operating systems, refer to the Operating System Support page on the Intel® FPGA website.
- Linux versions as supported on
Intel®
SoC FPGA products
on the
Arm*
ARMv7-A architecture.Important:
For x86_64 Linux systems, install the Linux OS kernel source and headers (for example, kernel-devel.x86_64 and kernel-headers.x86_64), and the GNU Compiler Collection (GCC) (gcc.x86_64).
To install the Linux kernel source or header package, invoke the yum install <kernel_package_name> command.
You must have administrator privileges on the host system to install the necessary packages and drivers.
Software Prerequisites
Develop your host application using one of the following RTE-compatible C compiler or software development environment:
- For Windows systems, use Microsoft Visual Studio Professional version 2010 or later.
- For Linux systems, use the C compiler included with the GCC.
- For SoC applications, use the GCC cross-compiler available with the Intel® SoC FPGA Embedded Development Suite (EDS).
Linux systems require the Perl command version 5 or later. Include the path to the Perl command in your PATH system environment variable setting.
For Intel® FPGA RTE for OpenCL™ packages that include Intel Code Builder, Intel Code Builder requires Java SE version 1.8.71 or later to run.
Contents of the Intel FPGA RTE for OpenCL Standard Edition
Utilities and Host Runtime Libraries
- The RTE Utility includes commands you can invoke to perform high-level tasks. The RTE utilities are a subset of of the Intel® FPGA SDK for OpenCL Standard Edition utilities.
- The host runtime provides the
OpenCL host platform API and runtime API for your OpenCL host application.
The host runtime consists of the following libraries:
- Statically-linked libraries provide OpenCL host APIs, hardware abstractions and helper libraries.
- Dynamic link libraries (DLLs) provide hardware abstractions and helper libraries.
Drivers, Libraries and Files
The RTE installation process installs the RTE into a directory that you own. The path to the software installation directory is referenced by the INTELFPGAOCLSDKROOT environment variable.
Windows Folder | Linux Directory | ARM Directory | Description |
---|---|---|---|
bin | bin | bin | High-level utilities. Include this directory in your PATH environment variable setting. |
board | board | board | The Reference Platform available
with the
RTE.
Important: The Reference Platform for the
RTE does not include the hardware subdirectory.
|
host | host | host | Files necessary for compiling your host program. |
host\include | host/include | host/include |
OpenCL Specification version 1.0 header files and software interface files necessary for compiling and linking your host application. The host/include/CL subdirectory also includes the C++ header file cl.hpp. The file contains an OpenCL version 1.1 C++ wrapper API. These C++ bindings enable a C++ host program to access the OpenCL runtime APIs using native C++ classes and methods. Important: The OpenCL version 1.1 C++
bindings are compatible with OpenCL Specification versions 1.0
and 1.1.
Add this path to the include file search path in your development environment. |
host\windows64\lib | host/linux64/lib | host/arm32/lib | OpenCL host runtime libraries for
the given target platform that provide the OpenCL platform and
runtime APIs. These libraries are necessary for linking and running
your host application. Prior to running your host application, include this directory in the library search path.
|
host\windows64\bin | host/linux64/bin | host/arm32/bin | Platform-specific binary for the RTE Utility, runtime commands, and DLLs (for Windows) necessary for running your host application, wherever applicable. Include this directory in your PATH environment variable setting. |
share\lib\perl | share/lib/perl | share/lib/perl | Perl scripts and support libraries for the RTE Utility. |
Example OpenCL Applications
You can download example OpenCL applications from the OpenCL Design Examples page.
RTE Utility
Displaying the Software Version
aocl <version>.<build> (Intel(R) Runtime Environment for OpenCL(TM), Version <version> Build <build>, Copyright (C) <year> Intel Corporation)
Listing the Intel FPGA RTE for OpenCL Standard Edition Utility Command Options
Managing an FPGA Board
For more information about the install, uninstall, diagnose, program and flash utility commands, refer to the Managing an FPGA Board section of the Intel FPGA SDK for OpenCL Standard Edition Programming Guide.
Managing Host Application
For Linux systems, if you debug your host application using the GNU Project Debugger (GDB), invoke the following command prior to running the host application:
handle SIG44 nostop
Without this command, the GDB debugging process terminates with the following error message:
Program received signal SIG44, Real-time event 44.
For information on the following utility command options, refer to the Managing Host Application section of the Intel FPGA SDK for OpenCL Standard Edition Programming Guide:
- example-makefile or makefile
- compile-config
- ldflags
- ldlibs
- link-config or linkflags
Overview of the Intel FPGA RTE for OpenCL Standard Edition Setup Process
For an overview of the RTE setup process for SoC, refer to Getting Started with the Intel® FPGA RTE for OpenCL™ for Intel® ARMv7-A SoC.
Getting Started with the Intel FPGA RTE for OpenCL Standard Edition for 64-Bit Windows
Figure 1 outlines the RTE setup process for 64-bit Windows systems.
- Downloading the Intel FPGA RTE for OpenCL Standard Edition
Download the Intel® FPGA RTE for OpenCL™ Standard Edition for Windows from the Intel® FPGA RTE for OpenCL™ Download Center. - Installing the Intel FPGA RTE for OpenCL
Install the Windows version of the Intel® FPGA RTE for OpenCL™ Standard Edition in a folder that you own. - Setting the Intel FPGA RTE for OpenCL Standard Edition User Environment Variables
You have the option to set the Intel® FPGA RTE for OpenCL™ Standard Edition Windows user environment variables permanently or transiently. - Verifying Software Installation
Invoke the version utility command and verify that the correct version of the OpenCL™ software is installed. - Installing an FPGA Board
To install your board into a Windows host system, invoke the install <path_to_customplatform> utility command. - Updating the Hardware Image on the FPGA
If applicable, before you execute an OpenCL™ kernel program on the FPGA, ensure that the flash memory of the FPGA contains a hardware image created using a current version of the OpenCL software. - Executing an OpenCL Kernel on an FPGA
Build your OpenCL™ host application in Microsoft Visual Studio, and run the application by invoking the hello_world.exe executable. - Uninstalling the Software
To uninstall the Intel® FPGA RTE for OpenCL™ Standard Edition for Windows, delete the RTE folder and restore all modified environment variables to their previous settings. - Uninstalling the FPGA Board
To uninstall an FPGA board for Windows, invoke the uninstall utility command, uninstall the Custom Platform, and unset the relevant environment variables.
Downloading the Intel FPGA RTE for OpenCL Standard Edition
- Go to the Intel® FPGA RTE for OpenCL™ Download Center at the following URL:
- Select the Standard edition.
- Select the software version. The default selection is the current version.
-
Select one of the following download methods:
- Akamai DLM3 Download Manager
- Direct Download
- Click the RTE tab and select Intel® FPGA Runtime Environment for OpenCL Windows x86-64. Click More beside Download and install instructions to view the download and installation procedure.
- Click the download button to start the download process.
- Perform the steps outlined in the download and installation instructions on the download page.
Installing the Intel FPGA RTE for OpenCL
To install the Intel® FPGA RTE for OpenCL™ , perform the following tasks:
- Run the setup.bat file to install the SDK with the Intel® Quartus® Prime Standard Edition software.
-
Run the .exe installer.
Direct the installer to extract the software to an empty folder that you own
(that is, not a system folder).
Note: The installation path must not contain any spaces (for example, <home_directory>\intelfpga\<version>\ aclrt-windows64).
-
Note: The installer sets the user environment variable INTELFPGAOCLSDKROOT to point to the path of the software installation.Verify that INTELFPGAOCLSDKROOT points to the current version of the software. Open a Windows command window and then type echo %INTELFPGAOCLSDKROOT% at the command prompt.If the returned path does not point to the location of the Intel® FPGA RTE for OpenCL™ installation, edit the INTELFPGAOCLSDKROOT setting.
Setting the Intel FPGA RTE for OpenCL Standard Edition User Environment Variables
Environment Variable | Path to Include |
---|---|
PATH |
where INTELFPGAOCLSDKROOT points to the path of the software installation |
-
To apply permanent environment variable settings, perform the
following tasks:
- Click Windows Start menu > Control Panel (or search for and then open the Control Panel application in Windows 8.1 and Windows 10).
- Click System and Security > System.
- In the System window, click Advanced system settings.
- Click the Advanced tab in the System Properties dialog box.
-
Click Environment
Variables.
The Environment Variables dialog box appears.
- To modify an existing environment variable setting, select the variable under User variables for <user_name> and then click Edit. In the Edit User Variable dialog box, type the environment variable setting in the Variable value field.
- If you add a new environment variable, click New under User variables for <user_name>. In the New User Variable dialog box, type the environment variable name and setting in the Variable name and Variable value fields, respectively.
For an environment variable with multiple settings, add semicolons to separate the settings.
-
To apply transient environment variable settings, open a
command window and run the %INTELFPGAOCLSDKROOT%\init_opencl.bat script.
Example script output:
AOCL_BOARD_PACKAGE_ROOT path is not set in environment Setting to default s5_ref board. If you want to target another board, do set AOCL_BOARD_PACKAGE_ROOT=board_pkg_dir and re-run this script Adding %INTELFPGAOCLSDKROOT%\bin to PATH Adding %INTELFPGAOCLSDKROOT%\host\windows64\bin to PATH Adding %AOCL_BOARD_PACKAGE_ROOT%\windows64\bin to PATH
where AOCL_BOARD_PACKAGE_ROOT points to the path of the Custom or Reference Platform.
Running the init_opencl.bat script only affects the current command window. The script performs the following tasks:- Finds the Microsoft Visual Studio installation
- Imports the Microsoft Visual Studio environment to properly set the LIB environment variable
- Ensures that the PATH environment variable includes the path to the Microsoft LINK.EXE file and the aocl.exe file
Verifying Software Installation
-
At a command prompt, invoke the
aocl
version
utility command.
An output similar to the one below notifies you of a successful installation:
aocl <version>.<build> (Intel(R) FPGA Runtime Environment for OpenCL(TM), Version <version> Build <build>, Copyright (C) <year> Intel® Corporation)
- If installation was unsuccessful, reinstall the software. You can also refer to the Intel® FPGA Software Installation and Licensing manual and the Intel FPGA Knowledge Base for more information.
Installing an FPGA Board
- Follow your board vendor's instructions to connect the FPGA board to your system.
- Download the Custom Platform for your FPGA board from your board vendor's website. To download an Intel® FPGA SDK for OpenCL Reference Platform, refer to the Intel® FPGA SDK for OpenCL FPGA Platforms page.
-
Install the Custom Platform in a folder that you own (that is,
not a system folder).
You can install multiple Custom Platforms simultaneously on the same system using the RTE utilities, such as aocl diagnose with multiple Custom Platforms, you must set the AOCL_BOARD_PACKAGE_ROOT environment variable to point to the location of the Custom Platform subdirectory of the board on which you wish to run the utility. The Custom Platform subdirectory contains the board_env.xml file. To run the RTE utilities on a different Custom Platform, you must update the AOCL_BOARD_PACKAGE_ROOT environment variable to point to the location of the Custom Platform subdirectory of that specific board.
In a system with multiple Custom Platforms, ensure that the host program uses the FPGA Client Driver (FCD) to discover the boards rather than linking to the Custom Platforms' memory-mapped device (MMD) libraries directly. As long as FCD is correctly set up for Custom Platform, FCD finds all the installed boards at runtime.
-
Set the user environment variable AOCL_BOARD_PACKAGE_ROOT to point to the location of the Custom
Platform subdirectory containing the board_env.xml file.
For example, for s5_net, set AOCL_BOARD_PACKAGE_ROOT to point to the <path_to_s5_net>/s5_net directory.Note: If you ran the $INTELFPGAOCLSDKROOT/init_opencl.sh script to set the SDK user environment variables, the script has set AOCL_BOARD_PACKAGE_ROOT to point to $INTELFPGAOCLSDKROOT/board/s5_ref, by default.
-
Add the paths to the Custom Platform libraries (for example,
the memory-mapped (MMD) library) to the PATH
environment variable setting.
For example, if you use an Intel® FPGA SDK for OpenCL Reference Platform, the Windows PATH environment variable setting is %AOCL_BOARD_PACKAGE_ROOT%\windows64\bin.
For information on setting user environment variables and running the init_opencl script, refer to the Setting the Intel® FPGA RTE for OpenCL™ Standard Edition User Environment Variables section.
-
Invoke the command
aocl
install
<path_to_customplatform>
at a command prompt.
Invoking aocl install <path_to_customplatform> also installs a board driver that allows communication between host applications and hardware kernel programs.Remember: You need administrative rights to install a board. To run a Windows command prompt as an administrator, click Start > All Programs > Accessories. Under Accessories, right click Command Prompt, In the right-click menu, click Run as Administrator.
-
To query a list of FPGA devices installed in your machine,
invoke the
aocl
diagnose
command.
The software generates an output that includes the <device_name>, which is an acl number that ranges from acl0 to acl31.Attention: For more information on querying the <device_name> of your accelerator board, refer to the Querying the Device Name of Your FPGA Board section.
- To verify the successful installation of the FPGA board, invoke the command aocl diagnose <device_name> to run any board vendor-recommended diagnostic test.
Updating the Hardware Image on the FPGA
- If your Custom Platform requires that you preload a valid OpenCL image into the flash memory, for every major release of the Intel Quartus® Prime Design Suite, program the flash memory of the FPGA with a hardware image compatible with the current version of the software.
Querying the Device Name of Your FPGA Board
aocl diagnose: Running diagnostic from INTELFPGAOCLSDKROOT/board/<board_name>/<platform>/libexec Verified that the kernel mode driver is installed on the host machine. Using board package from vendor: <board_vendor_name> Querying information for all supported devices that are installed on the host machine ... device_name Status Information acl0 Passed <descriptive_board_name> PCIe dev_id = <device_ID>, bus:slot.func = 02:00.00, at Gen 2 with 8 lanes. FPGA temperature = 43.0 degrees C. acl1 Passed <descriptive_board_name> PCIe dev_id = <device_ID>, bus:slot.func = 03:00.00, at Gen 2 with 8 lanes. FPGA temperature = 35.0 degrees C. Found 2 active device(s) installed on the host machine, to perform a full diagnostic on a specific device, please run aocl diagnose <device_name> DIAGNOSTIC_PASSED
Programming the Flash Memory of an FPGA
Preloading an OpenCL image into the flash memory is necessary for the proper functioning of many Custom Platforms. For example, most PCIe®-based boards require a valid OpenCL image in flash memory so that hardware on the board can use the image to configure the FPGA device when the host system powers up for the first time. If the FPGA is not configured with a valid OpenCL image, the system will fail to enumerate the PCIe endpoint, or the driver will not function.
Before running any designs, ensure that the flash memory of your board has a valid OpenCL image that is compatible with the current OpenCL software version. Consult your board vendor's documentation for board-specific requirements.
To load your hardware configuration file into the flash memory of your FPGA board, perform the following tasks:
-
Install any drivers or utilities that your Custom Platform
requires.
For example, some Custom Platforms require you to install the Intel® FPGA Download Cable driver to load your hardware configuration file into the flash memory. For installation instructions, refer to the Intel® FPGA Download Cable User Guide.
-
Verify that you set the AOCL_BOARD_PACKAGE_ROOT environment variable to point to the
subfolder in your Custom Platform that contains the board_env.xml file. Open a Windows command window and type
echo %AOCL_BOARD_PACKAGE_ROOT% at the
command prompt.
If the returned path does not point to the location of the board_env.xml file within your Custom Platform, follow the instructions in Setting the Intel® FPGA RTE for OpenCL™ Standard Edition User Environment Variables to modify the environment variable setting.
-
Download
a
design
example for your Custom Platform.
Remember: Download design examples from the OpenCL Design Examples page, and extract the example to a location that you have write access for. Ensure that the location name does not contain spaces.
- To load the hardware configuration file into the flash memory, invoke the aocl flash <device_name> <design_example_filename>.aocx command, where <device_name> refers to the acl number (e.g. acl0 to acl31) that corresponds to your FPGA device, and <design_example_filename>.aocx is the hardware configuration file you create from the <design_example_filename>.cl file in the design example package.
-
Power down your device or computer and then power it up
again.
Power cycling ensures that the FPGA configuration device retrieves the hardware configuration file from the flash memory and configures it into the FPGA.Warning: Some Custom Platforms require you to power cycle the entire host system after programming the flash memory. For example, PCIe-based Custom Platforms might require a host system restart to reenumerate the PCIe endpoint. Intel® recommends that you power cycle the complete host system after programming the flash memory.
Executing an OpenCL Kernel on an FPGA
Building the Host Application
- Verify that FCD and ICD are set up correctly. You must set up FCD and ICD manually if invoking the aocl install <path_to_customplatform> utility command fails to set them up. For instructions, refer to the Accessing Custom Platform-Specific Functions and Linking to the ICD Loader Library on Windows sections of the Intel® FPGA RTE for OpenCL™ Standard Edition Programming Guide for more information.
- Link the host application to the OpenCL.lib library.
- Under the solution properties, select Configuration Properties > Linker > Input.
- In the Additional Dependencies field, enter OpenCL.lib.
Attention: Because you are using FCD and ICD, do not link the host program to alteracl.lib or to your Custom Platform's MMD libraries directly.
- Open the <path_to_exm_opencl_hello_world_x64_windows_<version>>\hello_world\hello_world.sln file in Microsoft Visual Studio.
- Verify that the build configuration is correct. The default build configuration is Debug, but you can use Release. You must select the appropriate option as the solution platform (for example, for x64 architecture, select x64).
-
Build the solution
by selecting the
Build > Build
Solution menu option, or by pressing the F7
key.
The hello_world.exe executable will be in the <path_to_exm_opencl_hello_world_x64_windows_<version>>\hello_world\bin folder.
-
Verify that the
build is correct. An output ending with a message similar to the one shown
below notifies you of a successful build:
1> Build succeeded. 1> 1> Time Elapsed 00:00:03:29 ========== Build: 1 succeeded, 0 failed, 0 up-to-date, 0 skipped ==========
Attention: You can ignore the LNK4009: PDB 'vc90.pdb' was not found with... warnings because they have no effect on the build. The compiler might issue this type of warning messages if you have built your Windows libraries using a previous version of Microsoft Visual Studio.
Running the Host Application
- Add the path %INTELFPGAOCLSDKROOT%\host\windows64\bin to the PATH environment variable.
- At a command prompt, navigate to the host executable within the <path_to_exm_opencl_hello_world_x64_windows_<version>>\hello_world\bin folder.
-
Invoke the
hello_world.exe executable.
The hello_world executable executes the kernel code on the FPGA.
Output from Successful Kernel Execution
Example output:
Reprogramming device [0] with handle 1 Querying platform for info: ========================== CL_PLATFORM_NAME = Intel(R) FPGA SDK for OpenCL(TM) CL_PLATFORM_VENDOR = Intel Corporation CL_PLATFORM_VERSION = OpenCL 1.0 Intel(R) FPGA SDK for OpenCL(TM), <version> Querying device for info: ======================== CL_DEVICE_NAME = <board name> : <descriptive board name> CL_DEVICE_VENDOR = <board vendor name> CL_DEVICE_VENDOR_ID = <board vendor ID> CL_DEVICE_VERSION = OpenCL 1.0 Intel(R) FPGA SDK for OpenCL(TM), <version> CL_DRIVER_VERSION = <version> CL_DEVICE_ADDRESS_BITS = 64 CL_DEVICE_AVAILABLE = true CL_DEVICE_ENDIAN_LITTLE = true CL_DEVICE_GLOBAL_MEM_CACHE_SIZE = 32768 CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE = 0 CL_DEVICE_GLOBAL_MEM_SIZE = 8589934592 CL_DEVICE_IMAGE_SUPPORT = true CL_DEVICE_LOCAL_MEM_SIZE = 16384 CL_DEVICE_MAX_CLOCK_FREQUENCY = 1000 CL_DEVICE_MAX_COMPUTE_UNITS = 1 CL_DEVICE_MAX_CONSTANT_ARGS = 8 CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE = 2147483648 CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS = 3 CL_DEVICE_MEM_BASE_ADDR_ALIGN = 8192 CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE = 1024 CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR = 4 CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT = 2 CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT = 1 CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG = 1 CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT = 1 CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE = 0 Command queue out of order? = false Command queue profiling enabled? = true Using AOCX: hello_world.aocx Kernel initialization is complete. Launching the kernel... Thread #2: Hello from the Intel(R) FPGA OpenCL(TM) compiler! Kernel execution is complete.
Uninstalling the Software
- In Windows Explorer, navigate to the altera\<version> <edition> folder.
- Delete the aclrte-windows64 folder.
-
Remove the following paths from the PATH environment variable:
- %INTELFPGAOCLSDKROOT%\bin
- %INTELFPGAOCLSDKROOT%\host\windows64\bin
- Remove the INTELFPGAOCLSDKROOT environment variable.
Uninstalling the FPGA Board
To uninstall your FPGA board, perform the following tasks:
- Following your board vendor's instructions to disconnect the board from your machine.
- Invoke the aocl uninstall <path_to_customplatform> utility command to remove the current host computer drivers (for example, PCIe® drivers). The Intel® FPGA RTE for OpenCL™ uses these drivers to communicate with the FPGA board.
- Uninstall the Custom Platform.
- Unset the PATH environment variable.
- Unset the AOCL_BOARD_PACKAGE_ROOT environment variable.
Getting Started with the Intel FPGA RTE for OpenCL Standard Edition for x86_64 Linux Systems
Figure 1 outlines the RTE setup process for x86_64 Linux systems.
- Downloading the Intel FPGA RTE for OpenCL Standard Edition
Download the Intel® FPGA RTE for OpenCL™ Standard Edition for Linux from the Download Center. - Installing the Intel FPGA RTE for OpenCL
Install the Linux version of the Intel® FPGA RTE for OpenCL™ Standard Edition in a directory that you own. - Setting the Intel FPGA RTE for OpenCL Standard Edition User Environment Variables
You have the option to set the Intel® FPGA RTE for OpenCL™ Standard Edition Linux user environment variables permanently or transiently. - Verifying Software Installation
Invoke the version utility command and verify that the correct version of the OpenCL™ software is installed. - Installing an FPGA Board
To install your board into a Linux host system, invoke the install utility command. - Updating the Hardware Image on the FPGA
If applicable, before you execute an OpenCL™ kernel program on the FPGA, ensure that the flash memory of the FPGA contains a hardware image created using a current version of the OpenCL software. - Executing an OpenCL Kernel on an FPGA
You must build your OpenCL™ host application with the Makefile file, and run the application by invoking the hello_world executable. - Uninstalling the Software
To uninstall the Intel® FPGA RTE for OpenCL™ Standard Edition for Linux, remove the software package via the RPM uninstaller, then delete the software directory and restore all modified environment variables to their previous settings. - Uninstalling the FPGA Board
To uninstall an FPGA board for Linux, invoke the uninstall utility command, uninstall the Custom Platform, and unset the relevant environment variables.
Downloading the Intel FPGA RTE for OpenCL Standard Edition
- Go to the Intel® FPGA RTE for OpenCL™ Download Center at the following URL:
- Select the Standard edition.
- Select the software version. The default selection is the current version.
-
Select one of the following download methods:
- Akamai DLM3 Download Manager
- Direct Download
- Click More beside Download and install instructions if you want to see the download and installation instructions.
- Click the RTE tab and select the installation package you want to download. Click More beside Download and install instructions to view the download and installation procedure.
- Click the download button to start the download process.
- Perform the steps outlined in the download and installation instructions on the download page.
Installing the Intel FPGA RTE for OpenCL
- You must have sudo or root privileges.
- You must install the Linux OS kernel source and headers (for example, kernel-devel.x86_64 and kernel-headers.x86_64), and the GNU Compiler Collection (GCC) (gcc.x86_64).
- If you are installing a package that includes Intel Code Builder, you must have Java SE 1.8.71 or later installed to run Intel Code Builder. If you have an earlier version of Java SE installed, you can still complete the installation of Intel Code Builder. However, you must meet the Java version prerequisite to run Intel Code Builder.
To install the Intel® FPGA RTE for OpenCL™ , perform the following tasks:
-
At the command prompt, type the RPM command to install the
downloaded RPM package.
Note: The installation path must not contain any spaces (for example, /usr/intelfpga/<version>/aclrte_linux64).
- To install the software using the Red Hat Package Manager (RPM), at
the command prompt, type the rpm -i
aocl-rte-<version>.x86_64.rpm command.
The RPM installs the software in the default location (for example, opt/intelfpga/aclrte-linux64).
- To install the software in the default location with verbose progress reporting, type rpm -ivh aocl-rte-<version>.x86_64.rpm
- To install the software in an alternate directory that you own (that is, not a system directory), type rpm -i --prefix <rte_destination_directory> aocl-rte-<version>.x86_64.rpm
- To install the software using the Red Hat Package Manager (RPM), at
the command prompt, type the rpm -i
aocl-rte-<version>.x86_64.rpm command.
-
Note: The installer sets the environment variable INTELFPGAOCLSDKROOT to point to the path of the software installation.Verify that INTELFPGAOCLSDKROOT points to the current version of the software. Open a shell and then type echo $INTELFPGAOCLSDKROOT at the command prompt.If the returned path does not point to the location of the Intel® FPGA RTE for OpenCL™ installation , edit the INTELFPGAOCLSDKROOT setting.
Setting the Intel FPGA RTE for OpenCL Standard Edition User Environment Variables
Environment Variable | Path to Include |
---|---|
PATH |
$INTELFPGAOCLSDKROOT/bin
where INTELFPGAOCLSDKROOT points to the path of the software installation |
LD_LIBRARY_PATH |
$INTELFPGAOCLSDKROOT/host/linux64/lib
$AOCL_BOARD_PACKAGE_ROOT/linux64/lib where AOCL_BOARD_PACKAGE_ROOT points to the path of the Custom or Reference Platform |
-
To apply permanent environment variable settings,
open
a shell and then type the export
<variable_name>="<variable_setting>":$<variable_name>
command.
For example, the command export PATH="$INTELFPGAOCLSDKROOT/bin":$PATH adds $INTELFPGAOCLSDKROOT/bin to the list of PATH settings.
-
To apply transient environment variable settings, open a
bash-shell command-line terminal and run the source
$INTELFPGAOCLSDKROOT/init_opencl.sh command. This
command does not work in other shells.
Example script output:
AOCL_BOARD_PACKAGE_ROOT path is not set in environment Setting to default s5_ref board. If you want to target another board, do set AOCL_BOARD_PACKAGE_ROOT=board_pkg_dir Adding $INTELFPGAOCLSDKROOT/bin to PATH Adding $INTELFPGAOCLSDKROOT/host/linux64/lib to LD_LIBRARY_PATH Adding $AOCL_BOARD_PACKAGE_ROOT/linux64/lib to LD_LIBRARY_PATH
where AOCL_BOARD_PACKAGE_ROOT points to the path of the Custom or Reference Platform.
Verifying Software Installation
-
At a command prompt, invoke the
aocl
version
utility command.
An output similar to the one below notifies you of a successful installation:
aocl <version>.<build> (Intel(R) FPGA Runtime Environment for OpenCL(TM), Version <version> Build <build>, Copyright (C) <year> Intel® Corporation)
- If installation was unsuccessful, reinstall the software. You can also refer to the Intel® FPGA Software Installation and Licensing manual and the Intel FPGA Knowledge Base for more information.
Installing an FPGA Board
- Follow your board vendor's instructions to connect the FPGA board to your system.
- Download the Custom Platform for your FPGA board from your board vendor's website. To download an Intel® FPGA RTE for OpenCL™ Reference Platform, refer to the Intel® FPGA RTE for OpenCL™ FPGA Platforms page.
-
Install the Custom Platform in a directory that you own (that
is, not a system directory).
You can install multiple Custom Platforms simultaneously on the same system. To use the RTE utilities, such as aocl diagnose with multiple Custom Platforms, you must set the AOCL_BOARD_PACKAGE_ROOT environment variable to point to the location of the Custom Platform subdirectory of the board on which you wish to run the utility. The Custom Platform subdirectory contains the board_env.xml file. To run the RTE utilities on a different Custom Platform, you must update the AOCL_BOARD_PACKAGE_ROOT environment variable to point to the location of the Custom Platform subdirectory of that specific board.
In a system with multiple Custom Platforms, ensure that the host program uses the FPGA Client Drivers (FCD) to discover the boards rather than linking to the Custom Platforms' memory-mapped device (MMD) libraries directly. If FCD is correctly set up for Custom Platform, FCD finds all the installed boards at runtime.
-
Set the user environment variable AOCL_BOARD_PACKAGE_ROOT to point to the location of the Custom
Platform subdirectory containing the board_env.xml file.
For example, for s5_net, set AOCL_BOARD_PACKAGE_ROOT to point to the <path_to_s5_net>/s5_net directory.
Note: If you ran the $INTELFPGAOCLSDKROOT/init_opencl.sh script to set the SDK user environment variables, the script has set AOCL_BOARD_PACKAGE_ROOT to point to $INTELFPGAOCLSDKROOT/board/s5_ref, by default. -
Add the
paths to
the Custom Platform
libraries
(for example, memory-mapped (MMD) library) to the LD_LIBRARY_PATH environment
variable
setting.
For example, if you use an Intel® FPGA RTE for OpenCL™ Reference Platform, the Linux LD_LIBRARY_PATH setting is $AOCL_BOARD_PACKAGE_ROOT/linux64/lib.
For information on setting Linux user environment variables and running the init_opencl script, refer to the Setting the Intel® FPGA RTE for OpenCL™ Standard Edition User Environment Variables section.
-
Remember: You need sudo or root privileges to install a board.Invoke the command aocl install <path_to_customplatform> at a command prompt.
Invoking aocl install <path_to_customplatform> also installs a board driver that allows communication between host applications and hardware kernel programs.
-
To query a list of FPGA devices installed in your machine,
invoke the
aocl
diagnose
command.
The software generates an output that includes the <device_name>, which is an acl number that ranges from acl0 to acl31.
Attention: For more information on querying the <device_name> of your accelerator board, refer to the Querying the Device Name of Your FPGA Board section. - To verify the successful installation of the FPGA board, invoke the command aocl diagnose <device_name> to run any board vendor-recommended diagnostic test.
Updating the Hardware Image on the FPGA
- If your Custom Platform requires that you preload a valid OpenCL image into the flash memory, for every major release of the Intel Quartus® Prime Design Suite, program the flash memory of the FPGA with a hardware image compatible with the current version of the software.
Querying the Device Name of Your FPGA Board
aocl diagnose: Running diagnostic from INTELFPGAOCLSDKROOT/board/<board_name>/<platform>/libexec Verified that the kernel mode driver is installed on the host machine. Using board package from vendor: <board_vendor_name> Querying information for all supported devices that are installed on the host machine ... device_name Status Information acl0 Passed <descriptive_board_name> PCIe dev_id = <device_ID>, bus:slot.func = 02:00.00, at Gen 2 with 8 lanes. FPGA temperature = 43.0 degrees C. acl1 Passed <descriptive_board_name> PCIe dev_id = <device_ID>, bus:slot.func = 03:00.00, at Gen 2 with 8 lanes. FPGA temperature = 35.0 degrees C. Found 2 active device(s) installed on the host machine, to perform a full diagnostic on a specific device, please run aocl diagnose <device_name> DIAGNOSTIC_PASSED
Programming the Flash Memory of an FPGA
Preloading an OpenCL image into the flash memory is necessary for the proper functioning of many Custom Platforms. For example, most PCIe®-based boards require a valid OpenCL image in flash memory so that hardware on the board can use the image to configure the FPGA device when the host system powers up for the first time. If the FPGA is not configured with a valid OpenCL image, the system will fail to enumerate the PCIe endpoint, or the driver will not function.
Before running any designs, ensure that the flash memory of your board has a valid OpenCL image that is compatible with the current OpenCL software version. Consult your board vendor's documentation for board-specific requirements.
To load your hardware configuration file into the flash memory of your FPGA board, perform the following tasks:
- Install any drivers or utilities that your Custom Platform requires.
-
Verify that you set the AOCL_BOARD_PACKAGE_ROOT environment variable to point to the
subfolder in your Custom Platform that contains the board_env.xml file. Open a shell and then type echo $AOCL_BOARD_PACKAGE_ROOT at the command
prompt.
If the returned path does not point to the location of the board_env.xml file within your Custom Platform, follow the instructions in Setting the Intel® FPGA RTE for OpenCL™ Standard Edition User Environment Variables to modify the environment variable setting.
-
Download a design example for your Custom Platform.
Remember: Download design examples from the OpenCL Design Examples page, and extract the example to a location to which you have write access. Ensure that the location name does not contain spaces.
- To load the hardware configuration file into the flash memory, invoke the aocl flash <device_name> <design_example_filename>.aocx command, where <device_name> refers to the acl number (e.g. acl0 to acl31) that corresponds to your FPGA device, and <design_example_filename>.aocx is the hardware configuration file you create from the <design_example_filename>.cl file in the example design package.
-
Power down your
device or computer and then power it up again.
Power cycling ensures that the FPGA configuration device retrieves the hardware configuration file from the flash memory and configures it into the FPGA.Warning: Some Custom Platforms require you to power cycle the entire host system after programming the flash memory. For example, PCIe-based Custom Platforms might require a host system restart to reenumerate the PCIe endpoint. Intel® recommends that you power cycle the complete host system after programming the flash memory.
Executing an OpenCL Kernel on an FPGA
Building the Host Application
To build the host application, perform the following tasks:
- Navigate to the hello_world directory.
-
Invoke the
$
make
-f Makefile
command. Alternatively, you can simply invoke the
make
command.
The hello_world executable will be in the <path_to_exm_opencl_hello_world_x64_linux_<version>>/hello_world/bin directory.
Running the Host Application
- Add the path $INTELFPGAOCLSDKROOT/host/linux64/lib to the LD_LIBRARY_PATH environment variable.
- At a command prompt, navigate to the host executable within the <path_to_exm_opencl_hello_world_x64_linux_<version>>/hello_world/bin directory.
-
Invoke the
hello_world
executable.
The hello_world executable executes the kernel code on the FPGA.
Output from Successful Kernel Execution
Example output:
Reprogramming device [0] with handle 1 Querying platform for info: ========================== CL_PLATFORM_NAME = Intel(R) FPGA SDK for OpenCL(TM) CL_PLATFORM_VENDOR = Intel Corporation CL_PLATFORM_VERSION = OpenCL 1.0 Intel(R) FPGA SDK for OpenCL(TM), <version> Querying device for info: ======================== CL_DEVICE_NAME = <board name> : <descriptive board name> CL_DEVICE_VENDOR = <board vendor name> CL_DEVICE_VENDOR_ID = <board vendor ID> CL_DEVICE_VERSION = OpenCL 1.0 Intel(R) FPGA SDK for OpenCL(TM), <version> CL_DRIVER_VERSION = <version> CL_DEVICE_ADDRESS_BITS = 64 CL_DEVICE_AVAILABLE = true CL_DEVICE_ENDIAN_LITTLE = true CL_DEVICE_GLOBAL_MEM_CACHE_SIZE = 32768 CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE = 0 CL_DEVICE_GLOBAL_MEM_SIZE = 8589934592 CL_DEVICE_IMAGE_SUPPORT = true CL_DEVICE_LOCAL_MEM_SIZE = 16384 CL_DEVICE_MAX_CLOCK_FREQUENCY = 1000 CL_DEVICE_MAX_COMPUTE_UNITS = 1 CL_DEVICE_MAX_CONSTANT_ARGS = 8 CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE = 2147483648 CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS = 3 CL_DEVICE_MEM_BASE_ADDR_ALIGN = 8192 CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE = 1024 CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR = 4 CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT = 2 CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT = 1 CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG = 1 CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT = 1 CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE = 0 Command queue out of order? = false Command queue profiling enabled? = true Using AOCX: hello_world.aocx Kernel initialization is complete. Launching the kernel... Thread #2: Hello from the Intel(R) FPGA OpenCL(TM) compiler! Kernel execution is complete.
Uninstalling the Software
-
Remove the software package by performing one of the following
tasks:
- To uninstall the RTE, type the rpm -e aocl-rte command.
- Remove $INTELFPGAOCLSDKROOT/bin from the PATH environment variable.
- Remove $INTELFPGAOCLSDKROOT/host/linux64/lib from the LD_LIBRARY_PATH environment variable.
- Remove the INTELFPGAOCLSDKROOT environment variable.
Uninstalling the FPGA Board
To uninstall your FPGA board, perform the following tasks:
- Disconnect the board from your machine by following the instructions provided by your board vendor.
- Invoke the aocl uninstall <path_to_customplatform> utility command to remove the current host computer drivers (for example, PCIe® drivers). The Intel® FPGA RTE for OpenCL™ uses these drivers to communicate with the FPGA board.
- Uninstall the Custom Platform.
- Unset the LD_LIBRARY_PATH environment variable.
- Unset the AOCL_BOARD_PACKAGE_ROOT environment variable.
Getting Started with the Intel FPGA RTE for OpenCL Standard Edition for Intel ARMv7-A SoC FPGA
The following sections provide instructions for setting up Windows and Linux versions of the RTE for use with the Cyclone® V SoC Development Kit.
Getting Started with the Intel FPGA RTE for OpenCL Standard Edition for SoC FPGA on Windows
- Downloading the Intel FPGA SDK for OpenCL Standard Edition and the SoC EDS Standard Edition
To get started with the Intel® FPGA RTE for OpenCL™ Standard Edition on the Cyclone® V SoC Development Kit, download the Intel® FPGA SDK for OpenCL Standard Edition and the SoC EDS Standard Edition for Windows from the Intel® FPGA Download Center. - Installing the Intel FPGA SDK for OpenCL Standard Edition for SoC FPGA
To get started with the RTE on the Cyclone V SoC Development Kit using the SD flash card image that comes with the SDK, install the SDK Standard Edition for Windows. If you want to create your own SD card image, install the RTE Standard Edition. - Installing the Intel SoC FPGA Embedded Development Suite Standard Edition
Install the SoC EDS Standard Edition for Windows to build your host application for OpenCL kernel deployment on an SoC board. - Recompiling the Linux Kernel Driver
If you need to rebuild the Linux kernel driver, recompile the aclsoc Linux kernel driver to the exact version of the Linux kernel running on the SoC FPGA. - Installing the Intel FPGA RTE for OpenCL Standard Edition onto the SoC FPGA Board
The RTE Standard Edition installation package for Intel® SoC FPGAs with 32-bit ARM® processor is available in tar format. - Installing the Cyclone V SoC Development Kit
To execute an OpenCL™ kernel on a Cyclone® V SoC FPGA, first install the Cyclone V SoC Development Kit and then apply the Intel® FPGA SDK for OpenCL-specific configurations. - Executing an OpenCL Kernel on an SoC FPGA
Build your host application using the GCC cross-compiler available with the SoC EDS. - Uninstalling the Intel FPGA RTE for OpenCL Standard Edition
To uninstall the RTE Standard Edition from the SoC FPGA board, delete the RTE directory and restore all modified environment variables to their previous settings.
Downloading the Intel FPGA SDK for OpenCL Standard Edition and the SoC EDS Standard Edition
- To download the SDK, follow the instructions outlined in the Downloading the Intel® FPGA SDK for OpenCL Standard Edition section of the Intel® FPGA SDK for OpenCL Standard Edition Getting Started Guide.
-
To download the
RTE, perform the following
tasks:
- Go to the Intel® FPGA SDK for OpenCL* Download Center at the following URL:
- Select the Standard edition.
- Select the software version. The default selection is the current version.
- Click the RTE tab. Click More beside Download and install instructions to view the download and installation procedure.
- Click the download button beside Intel® FPGA Runtime Environment for OpenCL Linux Cyclone V SoC TGZ to start the download process.
- Perform the steps outlined in the download and installation instructions on the download page.
-
Download the SoC EDS by performing the following steps:
- Go to the Intel® FPGA Download Center at the following URL: http://dl.altera.com,
- Click Embedded Software > SoC EDS to enter the download page for the subscription edition of the SoC EDS.
- Select the Standard edition.
- Select the software version. The default selection is the current version.
- Select Windows as the operating system.
- Select Akamai DLM3 Download Manager or Direct Download as the download method.
- If you select Akamai DLM3 Download Manager as the download method, click Download.
- If you select Direct Download as the download method, click Intel SoC FPGA Embedded Development Suite (EDS).
- Perform the steps outlined in the download and installation instructions on the download page.
Installing the Intel FPGA SDK for OpenCL Standard Edition for SoC FPGA
The Intel® FPGA SDK for OpenCL™ Cyclone® V SoC Development Kit Reference Platform (c5soc) includes an SD flash card image necessary for running OpenCL applications on the board. The SD flash card image includes the recompiled Linux kernel driver, preinstalled version of the Intel® FPGA RTE for OpenCL™ Standard Edition, and a script for setting environment variables.
-
To install the SDK, perform the following tasks:
-
Unpack the downloaded
tar
file into a folder that you own.
The installation path must not contain any spaces (for example, <home_directory>\intelfpga\<version>\hld).
- Run the setup.bat file to install the SDK and device support.
-
Unpack the downloaded
tar
file into a folder that you own.
- To install the RTE, unpack the .tgz file install the RTE in a folder that you own.
-
Note: The installer sets the environment variable INTELFPGAOCLSDKROOT to point to the path of the software installation.Verify that the installer sets the user environment variable INTELFPGAOCLSDKROOT to point to the current version of the software. Open a Windows command window and then type echo %INTELFPGAOCLSDKROOT% at the command prompt.If the returned path does not point to the location of the current SDK installation, or if the path is not set, modify the INTELFPGAOCLSDKROOT setting.
Installing the Intel SoC FPGA Embedded Development Suite Standard Edition
- Run the installer. Follow the installation instructions in the SoCEDSSetup-<version>-windows.exe executable. For more information, refer to the Installing the SoC EDS section of the Intel® SoC FPGA Embedded Development Suite User Guide.
-
Perform the tasks outlined in the Installing the
Arm*
DS-5*
Intel® SoC FPGA Edition
Toolkit section of the
Intel®
SoC FPGA Embedded Development Suite User
Guide to install the
Arm*
Development Studio 5* (DS-5*) Intel® SoC FPGA Edition Toolkit for your operating system.
For more information on the Arm* DS-5* Intel® SoC FPGA Edition Toolkit, refer to the Arm* DS-5* Intel® SoC FPGA Edition page of the ARM website.
- Consult the Licensing section of the Intel® SoC FPGA Embedded Development Suite User Guide for licensing instructions for the SoC EDS and the Arm* DS-5* Intel® SoC FPGA Edition Toolkit.
Recompiling the Linux Kernel Driver
- Unpack the aocl-rte-<version>.arm32.tgz tarball to a temporary directory on your development machine by typing the tar -xvfz aocl-rte-<version>.arm32.tgz command.
- Navigate to the INTELFPGAOCLSDKROOT/board/c5soc/driver subdirectory of the unpacked aclrte-arm32 package.
- Perform the tasks outlined in the Compiling the Linux Kernel for Cyclone V SoC section of the Intel® FPGA SDK for OpenCL™ Cyclone V SoC Development Kit Reference Platform Porting Guide.
Installing the Intel FPGA RTE for OpenCL Standard Edition onto the SoC FPGA Board
- Create an RTE directory on the board's file system by typing the mkdir <rte_destination_directory> command.
- Move the downloaded installation package aclrte-arm32.tgz to the RTE directory by typing the mv aclrte-arm32.tgz <rte_destination_directory> command.
- Type cd <rte_destination_directory> to navigate to the RTE directory.
- To unpack the tarball, type tar -xvfz aclrte-arm32.tgz at the command prompt.
- Transfer the aclsoc_drv.ko file you built on your development machine into the <rte_destination_directory>/board/c5soc/driver directory on the SoC FPGA board.
-
Set the environment variables, as shown below.
Intel recommends that you consolidate the settings of the environment variables into a file called init_opencl.sh. Then, run the command source ./init_opencl.sh to load all the environment variables and the OpenCL™ Linux kernel driver simultaneously.
export INTELFPGAOCLSDKROOT=<rte_destination_directory> export AOCL_BOARD_PACKAGE_ROOT=$INTELFPGAOCLSDKROOT/board/c5soc export PATH=$INTELFPGAOCLSDKROOT/bin:$PATH export LD_LIBRARY_PATH=$INTELFPGAOCLSDKROOT/host/arm32/lib:$LD_LIBRARY_PATH insmod $AOCL_BOARD_PACKAGE_ROOT/driver/aclsoc_drv.ko
Installing the Cyclone V SoC Development Kit
For the key components of a Cyclone V SoC Development Kit, refer to Getting Started with the Intel FPGA SDK for OpenCL Standard Edition for Intel ARMv7-A SoC FPGA.
- Writing an SD Card Image onto the Micro SD Flash Card
To write an Intel® FPGA SDK for OpenCL™-compatible SD card image onto the micro SD flash card on Windows, download and install the Win32 Disk Imager, and then write the SD card image onto the micro SD flash card. - Configuring the SW3 Switches
Configure the SW3 dual in-line package (DIP) switches on the Cyclone® V SoC Development Kit for use with the Intel® FPGA SDK for OpenCL™. - Setting Up Terminal Connection
To set up the terminal connection on the Cyclone® V SoC Development Kit for use with the Windows version of the Intel® FPGA SDK for OpenCL™, specify the USB virtual COM port settings. - Setting Environment Variables and Loading OpenCL Linux Kernel Driver
After you turn on the board and establish terminal connection, log into the Cyclone® V SoC Development Kit as user root with no password. Then, before you run your host application, set the environment variables and load the OpenCL™ Linux kernel driver. - Connecting the Board to Network via Ethernet
Connecting the Cyclone® V SoC Development Kit to the host network allows you to transfer files to and from your SoC FPGA.
Writing an SD Card Image onto the Micro SD Flash Card
The SD card image linux_sd_card_image.tgz is included in the Cyclone V SoC Development Kit Reference Platform, available with the SDK.
You must have administrator privileges.
-
Extract the files from the %INTELFPGAOCLSDKROOT%\board\c5soc\linux_sd_card_image.tgz
archive.
You can use tools such as 7zip or WinZip to extract the SD card image file from the .tgz archive.
- Download the Win32 Disk Imager from the SourceForge website.
- Unzip the Win32 Disk Imager and the SD card image to a directory that you own.
- Insert the micro SD card into the card reader and connect it to your PC.
- Launch the Win32 Disk Imager. In the dialog box, under Image File, browse to the SD card image file.
-
From the Device
pull-down menu, select the destination drive of the micro SD card.
Warning: Specifying the wrong device name might cause the SD card image to overwrite all existing data.
- Click Write.
- After you write the image onto the micro SD flash card, insert the card into the micro SD card slot on the Cyclone V SoC Development Kit.
-
Power up the board.
If the LEDs on the FPGA flash in a counter pattern, the image is written onto the micro SD card successfully. A section of OpenCL logic on the FPGA drives these LEDs.
Configuring the SW3 Switches
Switch | Configuration |
---|---|
1 | ON |
2 | OFF |
3 | ON |
4 | OFF |
5 | ON |
6 | ON |
Setting Up Terminal Connection
- Connect the board to your development machine via the micro-USB port that is closest to the power supply connector on the board.
- Connect the board to the power supply and power it up.
- Download the Virtual COM port (VCP) driver from the VCP driver download page on the Future Technology Devices International (FTDI) Ltd. website.
-
Determine the COM port in use.
- From the Windows Start menu, click Control Panel > Hardware and Sound.
- Under Devices and Printers, click Device Manager.
- In the Device Manager window, under Ports, click USB Serial Port (COM<X>).
- Connect either the Tera Term or PuTTY open-source terminal emulator to the COM port that the FDTI driver creates.
- Set the port settings to 115200, 8N1, with parity and control flow set to none.
- For Tera Term, select Setup > Terminal, and then change Code Page to 1250.
- Without powering down, restart the board.
Setting Environment Variables and Loading OpenCL Linux Kernel Driver
- Set the PATH, LD_LIBRARY_PATH, and AOCL_BOARD_PACKAGE_ROOT environment variables.
- Load the OpenCL Linux kernel driver.
export INTELFPGAOCLSDKROOT=<aocl_destination_directory> export AOCL_BOARD_PACKAGE_ROOT=$INTELFPGAOCLSDKROOT/board/c5soc export PATH=$INTELFPGAOCLSDKROOT/bin:$PATH export LD_LIBRARY_PATH=$INTELFPGAOCLSDKROOT/host/arm32/lib:$LD_LIBRARY_PATH insmod $AOCL_BOARD_PACKAGE_ROOT/driver/aclsoc_drv.ko
Connecting the Board to Network via Ethernet
- Connect the HPS Ethernet port of the board to your network.
-
Reboot the board.
The boards acquires an IP address, allowing you to initiate a Secure Shell (SSH) connection and runs a Secure Copy (SCP) program to login and transfer files.
Ensuring IP Address Acquisition
-
To check if your board has an IP address, search for the IP
address in boot messages such as the one shown below:
Sending discover... libphy: stmmac-0:04 - Link is Up - 1000/Full Sending discover... Sending select for 137.57.175.148... Lease of 137.57.175.148 obtained, lease time 86400 /etc/udhcpc.d/50default: Adding DNS 137.57.142.218 /etc/udhcpc.d/50default: Adding DNS 137.57.109.10 /etc/udhcpc.d/50default: Adding DNS 137.57.64.1 done.
The message Lease of <board_IP_address> obtained, lease time 86400 identifies the IP address of the board. -
If you receive the following output, perform a warm reboot of
the board by pressing the WARM button next to the LED lights.
Sending discover... libphy: stmmac-0:04 - Link is Up - 1000/Full Sending discover... Sending discover... No lease, failing
The board uses the dynamic host configuration protocol (DHCP) to acquire an IP address. If the session times out waiting for an IP assignment, reboot the CPU to restart the IP acquisition process. To reboot the CPU, press the Warm reset button next to the four HPS LEDs on the board. - If you are unable to acquire the IP address, ensure that the Ethernet cable is in good working condition and the Ethernet port on your network is enabled.
Executing an OpenCL Kernel on an SoC FPGA
The procedures outlined in this document are for building and running the host application for the hello_world example design. To execute the hello_world OpenCL™ kernel on your SoC FPGA, you must first create an hello_world.aocx file. For instructions on obtaining the hello_world example design and creating the hello_world.aocx file, refer to the Creating the FPGA Hardware Configuration File of an OpenCL Kernel section of the Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone V SoC Getting Started Guide.
Building the Host Application
-
Perform the following tasks to download the hello_world design
example.
- Download the SoC FPGA-specific hello_world design example ( <version> Arm32 Linux package (.tgz)) from the Hello World Design Example page.
-
Extract exm_opencl_hello_world_arm32_linux_<version>.tar to a location to which
you have write access.
Important: Ensure that the location name does not contain spaces.
- Verify that the AOCL_BOARD_PACKAGE_ROOT environment variable setting points to the Cyclone® V SoC Development Kit Reference Platform. Open a Windows command window and then type echo %AOCL_BOARD_PACKAGE_ROOT% at the command prompt.
If the returned path is not %INTELFPGAOCLSDKROOT%\board\c5soc, or if AOCL_BOARD_PACKAGE_ROOT is not set, modify the environment variable setting. -
At a command prompt, invoke
the following command to set the PATH
environment variable:
SET PATH=%PATH%;<path_to_SoCEDS_installation_dir>\ds-5\sw\gcc\bin
- Navigate to the <path_to_exm_opencl_hello_world_arm32_linux_<version>>\hello_world folder.
-
Invoke the make -f
Makefile command. Alternatively, you can simply invoke the
make command.
The hello_world executable will be in the <path_to_exm_opencl_hello_world_arm32_linux_<version>>\hello_world\bin folder.
Running the Host Application
- Log into your SoC FPGA board.
- Copy the hello_world.aocx hardware configuration file and the hello_world host executable from their current folders to the board.
-
Verify that the LD_LIBRARY_PATH environment variable setting includes
%INTELFPGAOCLSDKROOT%\host\arm32\lib. Run the command
echo $LD_LIBRARY_PATH.
If you ran the init_opencl.sh script, the LD_LIBRARY_PATH setting should point to %INTELFPGAOCLSDKROOT%\host\arm32\lib.
- To execute the kernel on the SoC FPGA, at a command prompt, navigate to the host executable folder and run the hello_world host executable.
Output from Successful Kernel Execution on the Cyclone V SoC Development Kit
Example output:
Reprogramming device [0] with handle 1 Querying platform for info: ========================== CL_PLATFORM_NAME = Intel(R) FPGA SDK for OpenCL(TM) CL_PLATFORM_VENDOR = Intel Corporation CL_PLATFORM_VERSION = OpenCL 1.0 Intel(R) FPGA SDK for OpenCL(TM), <version> Querying device for info: ======================== CL_DEVICE_NAME = c5soc : Cyclone V SoC Development Kit CL_DEVICE_VENDOR = Intel(R) Corporation CL_DEVICE_VENDOR_ID = 4466 CL_DEVICE_VERSION = OpenCL 1.0 Intel(R) FPGA SDK for OpenCL(TM), <version> CL_DRIVER_VERSION = <version> CL_DEVICE_ADDRESS_BITS = 64 CL_DEVICE_AVAILABLE = true CL_DEVICE_ENDIAN_LITTLE = true CL_DEVICE_GLOBAL_MEM_CACHE_SIZE = 32768 CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE = 0 CL_DEVICE_GLOBAL_MEM_SIZE = 2147483648 CL_DEVICE_IMAGE_SUPPORT = false CL_DEVICE_LOCAL_MEM_SIZE = 16384 CL_DEVICE_MAX_CLOCK_FREQUENCY = 1000 CL_DEVICE_MAX_COMPUTE_UNITS = 1 CL_DEVICE_MAX_CONSTANT_ARGS = 8 CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE = 3758096384 CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS = 3 CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS = 1024 CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE = 128 CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR = 4 CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT = 2 CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT = 1 CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG = 1 CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT = 1 CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE = 0 Command queue out of order? = false Command queue profiling enabled? = true Kernel initialization is complete. Launching the kernel... Thread #2: Hello from the Intel(R) FPGA SDK for OpenCL(TM) Compiler! Kernel execution is complete.
Uninstalling the Intel FPGA RTE for OpenCL Standard Edition
- Navigate to the root directory in the SoC FPGA board's file system that contains the <rte_destination_directory> directory.
- Type rm -rf <rte_destination_directory> to remove the RTE directory.
-
Remove the environment variable settings by typing the
following commands:
unset AOCL_BOARD_PACKAGE_ROOT
unset INTELFPGAOCLSDKROOT
unset PATH
unset LD_LIBRARY_PATH
- Uninstall the Intel® FPGA SDK for OpenCL Standard Edition on your host system and unset the corresponding environment variables.
Getting Started with the Intel FPGA RTE for OpenCL Standard Edition for SoC FPGA on Linux
- Downloading the Intel FPGA SDK for OpenCL Standard Edition and the SoC EDS Standard Edition
To get started with the Intel® FPGA RTE for OpenCL™ Standard Edition on the Cyclone® V SoC Development Kit, download the Intel® FPGA SDK for OpenCL™ Standard Edition and the SoC EDS Standard Edition for Linux from the Intel® FPGA Download Center. - Installing the Intel FPGA SDK for OpenCL Standard Edition for SoC FPGA
To get started with the RTE on the Cyclone V SoC Development Kit using the SD flash card image that comes with the SDK, install the SDK Standard Edition for Linux. If you want to create your own SD card image, install the RTE Standard Edition. - Installing the Intel SoC FPGA Embedded Development Suite Standard Edition
Install the Intel® SoC EDS Standard Edition for Linux to build your host application for OpenCL™ kernel deployment on an SoC FPGA board. - Recompiling the Linux Kernel Driver
If you need to rebuild the Linux kernel driver, recompile the aclsoc Linux kernel driver to the exact version of the Linux kernel running on the SoC FPGA. - Installing the Intel FPGA RTE for OpenCL Standard Edition onto the SoC FPGA Board
The RTE Standard Edition installation package for Intel® SoC FPGAs with 32-bit ARM® processor is available in tar format. - Installing the Cyclone V SoC Development Kit
To execute an OpenCL™ kernel on a Cyclone® V SoC FPGA, first install the Cyclone V SoC Development Kit and then apply the Intel® FPGA SDK for OpenCL-specific configurations. - Executing an OpenCL Kernel on an SoC FPGA
Build your host application using the GCC cross-compiler available with the SoC EDS. - Uninstalling the Intel FPGA RTE for OpenCL Standard Edition
To uninstall the RTE from the SoC FPGA board, delete the RTE directory and restore all modified environment variables to their previous settings.
Downloading the Intel FPGA SDK for OpenCL Standard Edition and the SoC EDS Standard Edition
- To download the SDK, follow the instructions outlined in the Downloading the Intel® FPGA SDK for OpenCL™ Standard Edition section of the Intel® FPGA SDK for OpenCL™ Standard Edition Getting Started Guide.
-
To download the
RTE, perform the following
tasks:
- Go to the Intel® FPGA SDK for OpenCL* Download Center at the following URL:
- Select the Standard edition.
- Select the software version. The default selection is the current version.
- Click the RTE tab. Click More beside Download and install instructions to view the download and installation procedure.
- Click the download button beside Intel® FPGA Runtime Environment for OpenCL Linux Cyclone V SoC TGZ to start the download process.
- Perform the steps outlined in the download and installation instructions on the download page.
-
Download the SoC EDS by performing the following steps:
- Go to the Intel® FPGA Download Center at the following URL:http://fpgasoftware.intel.com/opencl/,
- Click Embedded Software > SoC EDS to enter the download page for the subscription edition of the SoC EDS.
- Select the Standard edition.
- Select the software version. The default selection is the current version.
- Select Linux as the operating system.
- Select Direct Download as the download method.
-
Click Intel
SoC
FPGA
Embedded
Development
Suite (EDS).
Download will begin immediately.
- Perform the steps outlined in the download and installation instructions on the download page.
Installing the Intel FPGA SDK for OpenCL Standard Edition for SoC FPGA
The Intel® FPGA SDK for OpenCL™ Cyclone® V SoC Development Kit Reference Platform includes an SD flash card image necessary for running OpenCL applications on the board. The SD flash card image includes the recompiled Linux kernel driver, a preinstalled version of the Intel® FPGA RTE for OpenCL™ Standard Edition, and a script for setting environment variables.
-
To install the SDK, perform the following tasks:
- Unpack the downloaded tar file.
- Run the setup.sh file to install the SDK and device support.
- To install the RTE, unpack the .tgz file install the RTE in a directory that you own.
-
Note: The installer sets the environment variable INTELFPGAOCLSDKROOT to point to the path of the software installation.Verify that the installer sets the user environment variable INTELFPGAOCLSDKROOT to point to the current version of the software. Open a Windows command window and then type echo $INTELFPGAOCLSDKROOT at the command prompt.If the returned path does not point to the location of the current SDK installation, or if the path is not set, modify the INTELFPGAOCLSDKROOT setting.
Installing the Intel SoC FPGA Embedded Development Suite Standard Edition
- Run the SoCEDSSetup-<version>-linux.run installer. For more information, refer to the Installing the SoC EDS section of the Intel® SoC FPGA Embedded Development Suite User Guide.
-
Perform the tasks outlined in the Installing the
Arm*
DS-5*
Intel® SoC FPGA Edition
Toolkit section of the
Intel®
SoC FPGA Embedded Development Suite User
Guide to install the
Arm*
Development Studio 5* (DS-5*) Intel® SoC FPGA Edition Toolkit for your operating system.
For more information on the Arm* DS-5* Intel® SoC FPGA Edition Toolkit, refer to the Arm* DS-5* Intel® SoC FPGA Edition page of the ARM website.
- Consult the Licensing section of the Intel® SoC FPGA Embedded Development Suite User Guide for licensing instructions for the SoC EDS and the Arm* DS-5* Intel® SoC FPGA Edition Toolkit.
Recompiling the Linux Kernel Driver
- Unpack the aocl-rte-<version>.arm32.tgz tarball to a temporary directory on your development machine by typing the tar -xvfz aocl-rte-<version>.arm32.tgz command.
- Navigate to the INTELFPGAOCLSDKROOT/board/c5soc/driver subdirectory of the unpacked aclrte-arm32 package.
- Perform the tasks outlined in the Compiling the Linux Kernel for Cyclone V SoC section of the Intel® FPGA SDK for OpenCL™ Cyclone V SoC Development Kit Reference Platform Porting Guide.
Installing the Intel FPGA RTE for OpenCL Standard Edition onto the SoC FPGA Board
- Create an RTE directory on the board's file system by typing the mkdir <rte_destination_directory> command.
- Move the downloaded installation package aclrte-arm32.tgz to the RTE directory by typing the mv aclrte-arm32.tgz <rte_destination_directory> command.
- Type cd <rte_destination_directory> to navigate to the RTE directory.
- To unpack the tarball, type tar -xvfz aclrte-arm32.tgz at the command prompt.
- Transfer the aclsoc_drv.ko file you built on your development machine into the <rte_destination_directory>/board/c5soc/driver directory on the SoC FPGA board.
-
Set the environment variables, as shown below.
Intel recommends that you consolidate the settings of the environment variables into a file called init_opencl.sh. Then, run the command source ./init_opencl.sh to load all the environment variables and the OpenCL™ Linux kernel driver simultaneously.
export INTELFPGAOCLSDKROOT=<rte_destination_directory> export AOCL_BOARD_PACKAGE_ROOT=$INTELFPGAOCLSDKROOT/board/c5soc export PATH=$INTELFPGAOCLSDKROOT/bin:$PATH export LD_LIBRARY_PATH=$INTELFPGAOCLSDKROOT/host/arm32/lib:$LD_LIBRARY_PATH insmod $AOCL_BOARD_PACKAGE_ROOT/driver/aclsoc_drv.ko
Installing the Cyclone V SoC Development Kit
For the key components of a Cyclone V SoC Development Kit, refer to Getting Started with the Intel FPGA SDK for OpenCL Standard Edition for Intel ARMv7-A SoC FPGA.
Writing an SD Card Image onto the Micro SD Flash Card
The SD card image linux_sd_card_image.tgz is included in the Cyclone V SoC Development Kit Reference Platform, available with the SDK. Ensure that the environment variable AOCL_BOARD_PACKAGE_ROOT points to the location of the board_env.xml file in the Reference Platform.
You must have sudo or root privileges.
- To decompress the $INTELFPGAOCLSDKROOT/board/c5soc/linux_sd_card_image.tgz file, run the tar xvfz linux_sd_card_image.tgz command.
-
Insert the
micro
SD flash card into a card reader, and connect the reader to
your PC.
- If the flash card already contains an image, partitions will exist automatically in the micro SD card. Unmount or eject all these partitions.
- Run the dmesg | tail command to verify the device name of the flash card (for example, /dev/sde).
-
Write the SD card image onto the
micro
SD flash card by running the following commands:
sudo dd if=linux_sd_card_image of=/dev/sde bs=1M
sync
Attention: If the device name of your micro SD flash card is not /dev/sde, replace /dev/sde in the above command with the device name you obtain from Step 3.Warning: Specifying the wrong device name might cause the SD card image to overwrite all existing data. - After you write the image onto the micro SD flash card, insert the card into the micro SD card slot on the Cyclone V SoC Development Kit.
Configuring the SW3 Switches
Switch | Configuration |
---|---|
1 | ON |
2 | OFF |
3 | ON |
4 | OFF |
5 | ON |
6 | ON |
Setting Up Terminal Connection
- Connect the board to your development machine via the micro-USB port that is closest to the power supply connector on the board.
- Connect the board to the power supply and power it up.
- Run the command dmesg | tail to determine which device the Future Technology Devices International (FTDI) driver assigns for the connection (e.g. /dev/ttyUSB0).
-
Setup the minicom as follows:
- Ensure that minicom is installed on your system. If not, invoke the yum install minicom command.
- Run minicom -s as root to enter the minicom setup mode.
- Select Serial port setup and then press Enter.
- Press A to change Serial Device to /dev/ttyUSB0 and then press Enter.
- Press E to change the port settings. Press E again to select 115200 for Speed, and then press Q to set Data/Parity/Stopbits to 8-N-1 configuration.
- Press Enter twice to return to the main minicom setup menu.
- Select Save setup as dfl and then press Enter to save the minicom settings as defaults.
- Select Exit.
-
Without
powering down,
restart
the board.
You should see Linux boot messages appear on the terminal command of your choice.
Setting Environment Variables and Loading OpenCL Linux Kernel Driver
- Set the PATH, LD_LIBRARY_PATH, and AOCL_BOARD_PACKAGE_ROOT environment variables.
- Load the OpenCL Linux kernel driver.
export INTELFPGAOCLSDKROOT=<aocl_destination_directory> export AOCL_BOARD_PACKAGE_ROOT=$INTELFPGAOCLSDKROOT/board/c5soc export PATH=$INTELFPGAOCLSDKROOT/bin:$PATH export LD_LIBRARY_PATH=$INTELFPGAOCLSDKROOT/host/arm32/lib:$LD_LIBRARY_PATH insmod $AOCL_BOARD_PACKAGE_ROOT/driver/aclsoc_drv.ko
Connecting the Board to Network via Ethernet
- Connect the HPS Ethernet port of the board to your network.
-
Reboot the board.
The boards acquires an IP address, allowing you to initiate a Secure Shell (SSH) connection and runs a Secure Copy (SCP) program to login and transfer files.
Ensuring IP Address Acquisition
-
To check if your board has an IP address, search for the IP
address in boot messages such as the one shown below:
Sending discover... libphy: stmmac-0:04 - Link is Up - 1000/Full Sending discover... Sending select for 137.57.175.148... Lease of 137.57.175.148 obtained, lease time 86400 /etc/udhcpc.d/50default: Adding DNS 137.57.142.218 /etc/udhcpc.d/50default: Adding DNS 137.57.109.10 /etc/udhcpc.d/50default: Adding DNS 137.57.64.1 done.
The message Lease of <board_IP_address> obtained, lease time 86400 identifies the IP address of the board. -
If you receive the following output, perform a warm reboot of
the board by pressing the WARM button next to the LED lights.
Sending discover... libphy: stmmac-0:04 - Link is Up - 1000/Full Sending discover... Sending discover... No lease, failing
The board uses the dynamic host configuration protocol (DHCP) to acquire an IP address. If the session times out waiting for an IP assignment, reboot the CPU to restart the IP acquisition process. To reboot the CPU, press the Warm reset button next to the four HPS LEDs on the board. - If you are unable to acquire the IP address, ensure that the Ethernet cable is in good working condition and the Ethernet port on your network is enabled.
Mounting a Shared Drive
-
Check the /etc/fstab file
systems table file on your development PC for the line that describes the
mounting of the drive you want to use on the board.
The following example /etc/fstab entry indicates that the /data folder on the my_nas server is mounted to the /data folder on the development PC:my_nas:/data /data nfs exec,dev,suid,rw,tcp,hard,intr,vers=3,rsize=32768,wsize=32768,timeo=600,retrans=200
- Add the /etc/fstab entry described above to the /etc/fstab file on the Cyclone V SoC development board.
- Run the sync command to save the /etc/fstab file to the micro SD flash card.
-
Create an empty folder on the board that serves as the mounting
point for the network drive.
For example: type mkdir /data, where /data is the name of the folder.
-
Invoke the busybox mount
-a command.
If the mounting operation fails, rerun the command.
Using SSH and SCP
-
To establish a connection between the Cyclone V SoC Development Kit and the host system via SSH, invoke the
ssh root@<board_ip_address>
command from your development machine.
For instructions on how to identify <board_ip_address>, refer to the Ensuring IP Address Acquisition section.
- To transfer files, one at a time, from the host system to the board via SCP, invoke the scp <source_filename> root@<board_ip_address>:<target_filename> command from your development machine.
Executing an OpenCL Kernel on an SoC FPGA
The procedures outlined in this document are for building and running the host application for the hello_world example design. To execute the hello_world OpenCL™ kernel on your SoC FPGA, you must first create an hello_world.aocx file. For instructions on obtaining the hello_world example design and creating the hello_world.aocx file, refer to the Creating the FPGA Hardware Configuration File of an OpenCL Kernel section of the Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone V SoC Getting Started Guide.
Building the Host Application
- To build your host application for emulation, modify the AOCL_BOARD_PACKAGE_ROOT environment variable setting to point to a non-SoC Reference or Custom Platform. Verify the setting by opening a shell and then typingecho $AOCL_BOARD_PACKAGE_ROOT at the command prompt.
- To build your host application for kernel execution, verify that the AOCL_BOARD_PACKAGE_ROOT environment variable setting points to the Cyclone V SoC Development Kit Reference Platform.
-
At a command prompt, invoke the following command to set the
PATH environment variable:
export PATH=<path_to_SoCEDS_installation_dir>/ds-5/sw/gcc/bin:$PATH
- Navigate to the <path_to_exm_opencl_hello_world_arm32_linux_<version>>/hello_world directory.
-
Invoke the make -f
Makefile command. Alternatively, you can simply invoke the
make command.
The hello_world executable will be in the <path_to_exm_opencl_hello_world_arm32_linux_<version>>/hello_world/bin directory.
Running the Host Application
- Log into your SoC FPGA board.
- Copy the hello_world.aocx hardware configuration file and the hello_world host executable from their current directories to the board.
-
Verify that the LD_LIBRARY_PATH environment variable setting includes $INTELFPGAOCLSDKROOT/host/arm32/lib. Run the command
echo $LD_LIBRARY_PATH.
If you ran the init_opencl.sh script, the LD_LIBRARY_PATH setting should point to $INTELFPGAOCLSDKROOT/host/arm32/lib.
- To execute the kernel on the SoC FPGA, at a command prompt, navigate to the host executable directory and run the hello_world host executable.
Output from Successful Kernel Execution on the Cyclone V SoC Development Kit
Example output:
Reprogramming device [0] with handle 1 Querying platform for info: ========================== CL_PLATFORM_NAME = Intel(R) FPGA SDK for OpenCL(TM) CL_PLATFORM_VENDOR = Intel Corporation CL_PLATFORM_VERSION = OpenCL 1.0 Intel(R) FPGA SDK for OpenCL(TM), <version> Querying device for info: ======================== CL_DEVICE_NAME = c5soc : Cyclone V SoC Development Kit CL_DEVICE_VENDOR = Intel(R) Corporation CL_DEVICE_VENDOR_ID = 4466 CL_DEVICE_VERSION = OpenCL 1.0 Intel(R) FPGA SDK for OpenCL(TM), <version> CL_DRIVER_VERSION = <version> CL_DEVICE_ADDRESS_BITS = 64 CL_DEVICE_AVAILABLE = true CL_DEVICE_ENDIAN_LITTLE = true CL_DEVICE_GLOBAL_MEM_CACHE_SIZE = 32768 CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE = 0 CL_DEVICE_GLOBAL_MEM_SIZE = 2147483648 CL_DEVICE_IMAGE_SUPPORT = false CL_DEVICE_LOCAL_MEM_SIZE = 16384 CL_DEVICE_MAX_CLOCK_FREQUENCY = 1000 CL_DEVICE_MAX_COMPUTE_UNITS = 1 CL_DEVICE_MAX_CONSTANT_ARGS = 8 CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE = 3758096384 CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS = 3 CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS = 1024 CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE = 128 CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR = 4 CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT = 2 CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT = 1 CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG = 1 CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT = 1 CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE = 0 Command queue out of order? = false Command queue profiling enabled? = true Kernel initialization is complete. Launching the kernel... Thread #2: Hello from the Intel(R) FPGA SDK for OpenCL(TM) Compiler! Kernel execution is complete.
Uninstalling the Intel FPGA RTE for OpenCL Standard Edition
- Navigate to the root directory in the SoC FPGA board's file system that contains the <rte_destination_directory> directory.
- Type rm -rf <rte_destination_directory> to remove the RTE directory.
-
Remove the environment variable settings by typing the following commands:
unset AOCL_BOARD_PACKAGE_ROOT
unset INTELFPGAOCLSDKROOT
unset PATH
unset LD_LIBRARY_PATH
- Uninstall the Intel® FPGA SDK for OpenCL™ on your host system and unset the corresponding environment variables.
Document Revision History of the Intel FPGA RTE for OpenCL Standard Edition Getting Started Guide
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2018.09.24 | 18.1 |
|
2018.05.04 | 18.0 |
|
Date | Version | Changes |
---|---|---|
November 2017 | 2017.11.04 |
|
May 2017 | 2017.05.05 |
|
October 2016 | 2016.10.31 |
|
May 2016 | 2016.05.02 |
|
November 2015 | 2015.11.02 |
|
May 2015 | 15.0.0 |
|
December 2014 | 14.1.0 |
|
June 2014 | 14.0.0 | Initial release. |