1. In the Intel^® Quartus^® Prime Pro Edition main window, click File > New Project Wizard.
2. Specify project directory, name, and top-level entity.
3. Add design files and libraries.
4. Specify Intel^® FPGA device or Intel^® FPGA Development Kit/Board.
5. Specify Design Entry/Synthesis, simulation, and board-level tools.
   • For Intel^® Quartus^® Prime Synthesis, select <None>.
6. Review project settings and click Finish.

After adding design files to the project, you assign design elements to I/O pins, and apply appropriate timing constraints to correctly optimize fitting and analyze timing for the design.

1. Click Processing > Start > Start Analysis and Synthesis to Run Analysis and Synthesis in the project
2. Click Assignments > Pin Planner.
   Figure 2. Pin Planner Window

   
3. In the Pin Planner window, specify pin location, I/O standard, current settings, and slew rate.
4. Create a timing constraints file by clicking File > New and then clicking Synopsys* Design Constraints File.
5. Specify constraints for clock characteristics, timing exceptions, and external signal setup and hold times before running analysis.

1. Run a full design compilation by clicking Processing > Start Compilation.
   Intel^® Quartus^® Prime Pro Edition displays the compilation stages and progress in the Compilation Dashboard.

   Figure 3. Compilation Dashboard

   
   When the compilation finishes, modules that ran successfully show a green check image .
2. Click Processing > Compilation Report to view a report with detailed project information that helps you determine correct implementation.
   You can right-click report data to locate and edit the source in project files.

1. Click Tools > Timing Analyzer .
2. In the Tasks window, double-click Update Timing Netlist.
   This action includes Creating Timing Netlist and Read SDC File.

Figure 4. Timing Report

By contrasting the timing results with the design requirements, you can determine whether the design needs further optimization, or you can continue with the next steps in the flow.

1. In the Compilation Dashboard, run the Assembler stage to generate programming files.
2. Open the Programmer by clicking Tools > Programmer.
3. In the Programmer window, click Hardware Setup.
4. Select the hardware for the device, and click Close.
5. Click Auto Detect to detect devices connected to the computer.
6. Click the target device in the device list.
7. Click the programming file that you want to upload to the device, and click Start.
   When the Programmer finishes, the Progress bar on the upper left corner of the window indicates the outcome.