Nios II Software Developer Handbook
Version Information
Updated for: |
---|
Intel® Quartus® Prime Design Suite 20.4 |
1. Nios II Software Developer's Handbook Revision History
1.1. Overview of Nios II Embedded Development Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2020.09.28 | 20.3 | Clarified the support for WSL in section: Installing Windows Subsystem for Linux (WSL) on Windows. |
2020.07.28 | 20.2 | Corrected steps in section: Installing Windows Subsystem for Linux (WSL) on Windows. |
2019.12.04 | 19.2 | Corrected doc2unix to be dos2unix in the Installing Windows Subsystem for Linux (WSL) on Windows section. |
2019.07.01 | 19.2 | Added section: Installing Windows* Subsystem for Linux* (WSL) on Windows* . |
2018.10.29 | 18.1 | Editorial changes: Rebranding. |
2017.05.08 | 17.0 | Maintenance release. |
2015.05.14 | 15.0 | Initial release. |
1.2. Getting Started with the Graphical User Interface Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2020.09.28 | 20.3 | Divided the Installing Eclipse IDE into Nios® II EDS section into two sections. |
2019.04.30 | 19.1 | Added section: Installing Eclipse IDE into Nios® II EDS. |
2018.10.29 | 18.1 |
|
2017.05.08 | 17.0 |
|
2015.12.14 | 15.1 | Removed references of the SOPC Builder. |
2015.10.30 | 15.1 | Corrected the available versions of the GCC. |
2015.05.14 | 15.0 | Initial release. |
1.3. Getting Started from the Command Line Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2018.10.29 | 18.1 | Editorial changes: Rebranding. |
2017.05.08 | 17.0 | Maintenance release. |
2015.05.14 | 15.0 | Initial release. |
1.4. Nios II Software Build Tools Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2020.12.14 | 20.4 | Added a note about using the Tcl script in section: Top Level Tcl Script for BSP Defaults. |
2018.10.29 | 18.1 | Editorial changes: Rebranding. |
2017.05.08 | 17.0 | Removed the MacroC/OS-II Thread-Aware Debugging section. |
2015.05.14 | 15.0 | Initial release. |
1.5. Overview of the Hardware Abstraction Layer Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2018.10.29 | 18.1 | Editorial changes: Rebranding. |
2017.05.08 | 17.0 | Maintenance release. |
2015.05.14 | 15.0 | Initial release. |
1.6. Developing Programs Using the Hardware Abstraction Layer Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2018.10.29 | 18.1 | Editorial changes: Rebranding. |
2017.10.09 | 17.1 |
|
2017.05.08 | 17.0 | Maintenance release. |
2015.05.14 | 15.0 | Initial release. |
1.7. Developing Device Drivers for the Hardware Abstraction Layer Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2018.10.29 | 18.1 | Editorial changes: Rebranding. |
2017.05.08 | 17.0 | Maintenance release. |
2015.05.14 | 15.0 | Initial release. |
1.8. Exception Handling Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2018.10.29 | 18.1 | Editorial changes: Rebranding. |
2017.05.08 | 17.0 | Maintenance release. |
2015.05.14 | 15.0 | Initial release. |
1.9. Cache and Tightly-Coupled Memory Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2018.10.29 | 18.1 | Editorial changes: Rebranding. |
2017.05.08 | 17.0 | Maintenance release. |
2015.05.14 | 15.0 | Initial release. |
1.10. MicroC/OS-II Real-Time Operating System Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2020.12.14 | 20.4 | Updated the licensing information for commercial version of MicroC/OS-II in section: Licensing. |
2018.10.29 | 18.1 | Editorial changes: Rebranding. |
2017.05.08 | 17.0 | Maintenance release. |
2015.05.14 | 15.0 | Initial release. |
1.11. Ethernet and the NicheStack TCP/IP Stack - Nios II Edition Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2018.10.29 | 18.1 | Editorial changes: Rebranding. |
2017.05.08 | 17.0 | Maintenance release. |
2015.05.14 | 15.0 | Initial release. |
1.12. Read-Only Zip File System Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2018.10.29 | 18.1 | Editorial changes: Rebranding. |
2017.05.08 | 17.0 | Maintenance release. |
2015.05.14 | 15.0 | Initial release. |
1.13. Publishing Component Information to Embedded Software Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2018.10.29 | 18.1 | Editorial changes: Rebranding. |
2017.05.08 | 17.0 | Maintenance release. |
2015.05.14 | 15.0 | Initial release. |
1.14. HAL API Reference Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2018.10.29 | 18.1 | Editorial changes: Rebranding. |
2017.10.09 | 17.1 | Updated the description for alt_load_section(). |
2017.05.08 | 17.0 | Added the ADC HAL Device Driver APIs. |
2015.05.14 | 15.0 | Initial release. |
1.15. Nios II Software Build Tools Reference Revision History
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2020.04.29 | 20.1 | Added the following settings:
|
2018.10.29 | 18.1 |
|
2017.05.08 | 17.0 | Maintenance release. |
2015.05.14 | 15.0 | Initial release. |
2. Overview of Nios II Embedded Development
- The Nios® II Classic Software Developer's Handbook describes embedded software development tools for the Nios® II Classic cores; and there are no future updates planned.
- The Nios® II Software Developer's Handbook describes embedded software development tools for the Nios® II. It does not describe IP cores.
This handbook describes the basic information needed to develop embedded software for the Intel FPGA® Nios II processor. The Intel FPGA® Nios® II processor contains new features added after the Intel® Quartus® Prime 14.0 version. The chapters in this handbook describes the Nios® II software development environment, the Nios® II Embedded Design Suite (EDS) tools that are available to you, and the process for developing software.
2.1. Installing Windows Subsystem for Linux (WSL) on Windows
Starting with Nios® II EDS in Intel® Quartus® Prime Pro Edition version 19.2 and Intel® Quartus® Prime Standard Edition version 19.1, the Cygwin component in the Windows* version of Nios® II EDS has been removed and replaced with Windows* Subsystem for Linux* (WSL).
The procedure for installing WSL:
-
Go to https://docs.microsoft.com/en-us/windows/wsl/install-win10 and follow Microsoft*'s instructions to install
Ubuntu 18.04 LTS for WSL.
Note:
- Windows* 10 build version 16215.0 or higher is the recommended operating system version.
- Install only WSL 1 and skip the instructions for updating WSL 1 to WSL 2. WSL 2 is not supported.
- After installation has successfully completed, launch Ubuntu 18.04.
-
Install additional distro packages required for
Nios® II EDS using the following commands:
sudo apt update
sudo apt install wsl
sudo apt install dos2unix
sudo apt install make
Note: Ensure that all package dependencies, repositories lists, and internet connection for WSL are set correctly.
- For the Nios® II Command Shell, use all command line tools, as before, but you need to add .exe to launch a Windows* executable, like eclipse-nios2.exe or jtagconfig.exe.
- Nios® II BSP and application projects from previous Intel® Quartus® Prime Pro Edition releases are not compatible with this WSL solution. You are required to regenerate your projects.
2.2. Prerequisites for Understanding the Nios II Embedded Design Suite
The Nios® II Software Developer’s Handbook assumes you have a basic familiarity with embedded processor concepts. You do not need to be familiar with any specific Intel FPGA technology or with Intel FPGA development tools. Familiarity with Intel FPGA hardware development tools can give you a deeper understanding of the reasoning behind the Nios® II software development environment. However, software developers can create and debug applications without further knowledge of Intel FPGA technology.
2.3. Finding Nios II EDS Files
When you install the Nios II EDS, you specify a root directory for the EDS file structure. This root directory must be adjacent to the Quartus® II installation. When you install the latest release of the Nios II EDS on the Windows operating system, choose a local root folder that identifies the content, for example: c:\altera\<latest release number>\nios2eds.
2.4. Nios II Software Development Environment
The Nios® II EDS includes proprietary and open-source tools (such as the GNU C/C++ tool chain) for creating Nios® II programs. The Nios® II EDS automates board support package (BSP) creation for Nios® II processor-based systems, eliminating the need to spend time manually creating BSPs. The BSP provides a C/C++ runtime environment, insulating you from the hardware in your embedded system. Intel FPGA BSPs contain the Intel FPGA hardware abstraction layer (HAL), an optional RTOS, and device drivers.
2.5. Nios II EDS Development Flows
- The
Nios® II Software Build Tools (SBT), which provides two user interfaces:
- The Nios® II SBT command line
- The Nios® II SBT for Eclipse™
2.5.1. Nios II SBT Development Flow
The SBT allows you to create and manage single-threaded programs as well as complex applications based on an RTOS and middleware libraries available from Intel FPGA and third-party vendors.
The SBT provides powerful Tcl scripting capabilities. In a Tcl script, you can query project settings, specify project settings conditionally, and incorporate the software project creation process in a scripted software development flow. Tcl scripting is supported both in Eclipse and at the command line.
2.5.1.1. Nios II SBT for Eclipse
The Nios® II SBT for Eclipse is based on the popular Eclipse framework and the Eclipse C/C++ development toolkit (CDT) plugins. The Nios® II SBT creates your project makefiles for you, and Eclipse provides extensive capabilities for interactive debugging and management of source files.
The SBT for Eclipse also allows you to import and debug projects you created in the Nios® II Command Shell.
2.5.1.2. Nios II SBT Command Line
2.6. Nios II Programs
The Nios® II SBT creates software projects for you. Each project is based on a makefile.
2.6.1. Makefiles and the SBT
As a key part of creating a software project, the SBT creates a makefile for you. Nios® II projects are sometimes called "user-managed," because you, the user, are responsible for the content of the project makefile. You use the Nios® II SBT to control what goes in the makefile.
2.6.2. Nios II Software Project Types
2.6.2.1. Application Project
2.6.2.2. User Library Project
2.6.2.3. BSP Project
A BSP contains the following elements:
- Hardware abstraction layer
- Optional custom newlib C standard library1
- Device drivers
- Optional software packages
- Optional real-time operating system
2.7. Altera Software Packages for Embedded Systems
Name | Description |
---|---|
NicheStack TCP/IP Stack - Nios® II Edition | Refer to the "Ethernet and the NicheStack TCP/IP Stack - Nios® II Edition" chapter. |
Read-only zip file system | Refer to the "Read-Only Zip File System" chapter. |
Host file system | Refer to the "Developing Programs Using the Hardware Abstraction Layer" chapter. |
2.8. Nios II Embedded Design Examples
The Nios® II EDS includes documented software examples to demonstrate all prominent features of the Nios® II processor and the development environment. The examples can help you start the development of your custom design. They provide a stable starting point for exploring design options. Also, they demonstrate many commonly used features of the Nios® II EDS.
2.8.1. Hardware Examples
2.8.2. Software Examples
The Nios® II software examples directory contains the following files:
- Source file (.c)
- Header file (.h)
- readme.txt
- template.xml
2.9. Third-Party Embedded Tools Support
2.10. Additional Nios II Information
- The Nios® II Processor Reference Guide defines the processor hardware architecture and features, including the instruction set architecture.
- The Embedded Peripherals IP User Guide provides a reference for the peripherals distributed with the Nios® II processor. This handbook describes the hardware structure and Nios® II software drivers for each peripheral.
- The Embedded Design Handbook describes how to use the software development tools effectively, and recommends design styles and practices for developing, debugging, and optimizing embedded systems.
- The Intel FPGA Knowledge Database is an Internet resource that offers solutions to frequently asked questions with an easy-to-use search engine.
- Application notes and tutorials offer step-by-step instructions on using the Nios® II processor for a specific application or purpose. These documents are available on the Intel FPGA Nios® II Processor Documentation web page.
- The
Nios® II EDS documentation launchpad. The
launchpad is an HTML page installed with the
Nios® II EDS, which provides links to
Nios® II
documentation, examples, and other resources. The way you open the launchpad depends on
your software platform.
- In the Windows operating system, on the Start menu, point to Programs > Intel FPGA > Nios II EDS, and click Nios® II <version> Documentation.
- In the Linux operating system, open < Nios® II EDS install path>/documents/index.html in a web browser.
3. Getting Started with the Graphical User Interface
The Nios™ II Software Build Tools (SBT) for Eclipse™ is a set of plugins based on the Eclipse framework and the Eclipse C/C++ development toolkit (CDT) plugins. The Nios II SBT for Eclipse provides a consistent development platform that works for all Nios II embedded processor systems. You can accomplish all Nios II software development tasks within Eclipse, including creating, editing, building, running, debugging, and profiling programs.
3.1. Installing Eclipse IDE into Nios II EDS
3.1.1. Windows Installation
- Download CDT 8.8.1 which is Eclipse C/C++ IDE for Mars.2.
-
Extract the downloaded file into this directory: <
Intel®
Quartus® Prime installation
directory>/nios2eds/bin.
Note: In Windows environment, the eclipse-cpp-mars-2-win32-x86_64.zip must be extracted and renamed in the Downloads folder prior to moving its contents to the appropriate <Intel Quartus Prime installation directory>/nios2eds/bin folder. Copy and paste the eclipse_nios2_plugins.zip from the <Intel Quartus Prime installation directory>/nios2eds/bin folder to the Downloads folder. Extract the .zip file, copy, and paste its contents from the eclipse_nios2 folder into the <Intel Quartus Prime installation directory>/nios2eds/bin/eclipse_nios2 folder.You should see the < Intel® Quartus® Prime installation directory>/nios2eds/bin/eclipse folder after extraction is done.
- Rename the < Intel® Quartus® Prime installation directory>/nios2eds/bin/eclipse folder to < Intel® Quartus® Prime installation directory>/nios2eds/bin/eclipse_nios2.
-
Extract <
Intel®
Quartus® Prime installation
directory>/nios2eds/bin/eclipse_nios2_plugins.zip to <
Intel®
Quartus® Prime installation
directory>/nios2eds/bin.
The extraction overrides files in < Intel® Quartus® Prime installation directory>/nios2eds/bin/eclipse_nios2.
- Verify the extraction is done correctly by making sure you see the < Intel® Quartus® Prime installation directory>/nios2eds/bin/eclipse_nios2/plugin_customization.ini file.
-
You can now launch
Nios® II
SBT for Eclipse using eclipse-nios2.exe.
Note: The instructions are also included in the < Intel® Quartus® Prime installation directory>/nios2eds/bin/README file.
3.1.2. Linux Installation
- Download CDT 8.8.1 which is Eclipse C/C++ IDE for Mars.2.
-
Extract the downloaded file into this directory: <
Intel®
Quartus® Prime installation
directory>/nios2eds/bin.
You should see the < Intel® Quartus® Prime installation directory>/nios2eds/bin/eclipse folder after extraction is done.
- Rename the < Intel® Quartus® Prime installation directory>/nios2eds/bin/eclipse folder to < Intel® Quartus® Prime installation directory>/nios2eds/bin/eclipse_nios2.
-
Extract <
Intel®
Quartus® Prime installation
directory>/nios2eds/bin/eclipse_nios2_plugins.tar.gz to
<
Intel®
Quartus® Prime
installation directory>/nios2eds/bin.
The extraction overrides files in < Intel® Quartus® Prime installation directory>/nios2eds/bin/eclipse_nios2.
- Verify the extraction is done correctly by making sure you see the < Intel® Quartus® Prime installation directory>/nios2eds/bin/eclipse_nios2/plugin_customization.ini file.
-
You can now launch
Nios® II
SBT for Eclipse using eclipse-nios2.exe.
Note: The instructions are also included in the < Intel® Quartus® Prime installation directory>/nios2eds/bin/README file.
3.2. Getting Started with Nios II Software in Eclipse
Modifying existing code is a common, easy way to learn to start writing software in a new environment. The Nios II Embedded Design Suite (EDS) provides many example software designs that you can examine, modify, and use in your own programs. The provided examples range from a simple "Hello world" program, to a working RTOS example, to a full TCP/IP stack running a web server. Each example is documented and ready to compile.
This section guides you through the most fundamental operations in the Nios II SBT for Eclipse in a tutorial-like fashion. It shows how to create an application project for the Nios II processor, along with the board support package (BSP) project required to interface with your hardware. It also shows how to build the application and BSP projects in Eclipse, and how to run the software on an Intel FPGA® development board.
3.2.1. The Nios II SBT for Eclipse Workbench
3.2.1.1. Perspectives, Editors, and Views
Each workbench window contains one or more perspectives. Each perspective provides a set of capabilities for accomplishing a specific type of task.
Most perspectives in the workbench comprise an editor area and one or more views. An editor allows you to open and edit a project resource (i.e., a file, folder, or project). Views support editors, and provide alternative presentations and ways to navigate the information in your workbench.
Any number of editors can be open at once, but only one can be active at a time. The main menu bar and toolbar for the workbench window contain operations that are applicable to the active editor. Tabs in the editor area indicate the names of resources that are currently open for editing. An asterisk (*) indicates that an editor has unsaved changes. Views can also provide their own menus and toolbars, which, if present, appear along the top edge of the view. To open the menu for a view, click the drop-down arrow icon at the right of the view's toolbar or right-click in the view. A view might appear on its own, or stacked with other views in a tabbed notebook.
For detailed information about the Eclipse workbench, perspectives, and views, refer to the Eclipse help system.
Before you create a Nios II project, you must ensure that the Nios II perspective is visible. To open the Nios II perspective, on the Window menu, point to Open Perspective, then Other, and click Nios II.
3.2.1.2. The Altera Bytestream Console
3.2.2. Creating a Project
Alternatively, you can create separate application, BSP and user library projects.
3.2.2.1. Specifying the Application
You specify a BSP in the second page of the wizard.
3.2.2.1.1. Specifying the Hardware Platform
3.2.2.1.2. Specifying the Project Name
Select a descriptive name for your project. The SBT creates a folder with this name to contain the application project files.
Letters, numbers, and the underscore (_) symbol are the only valid project name characters. Project names cannot contain spaces or special characters. The first character in the project name must be a letter or underscore. The maximum filename length is 250 characters.
3.2.2.1.3. Specifying the Project Template
You select the project template from the Templates list.
The hello_world template provides an easy way to create your first Nios II project and verify that it builds and runs correctly.
3.2.2.1.4. Specifying the Project Location
To place your application project in a different folder, turn off Use default location, and specify the path in the Project location box.
3.2.2.1.5. Specifying the Processor
3.2.2.2. Specifying the BSP
On the second page, you specify the BSP to link with your application. You can create a new BSP for your application, or select an existing BSP. Creating a new BSP is often the simplest way to get a project running the first time.
You optionally specify the name and location of the BSP.
3.2.2.2.1. Specifying the BSP Project Name
3.2.2.2.2. Specifying the BSP Project Location
3.2.2.2.3. Selecting an Existing BSP
3.2.2.3. Creating the Projects
The SBT copies required source files to your project directories, and creates makefiles and other generated files. Finally, the SBT executes a make clean command on your BSP.
3.2.3. Navigating the Project
When you have created a Nios II project, it appears in the Project Explorer view, which is typically displayed at the left side of the Nios II perspective. You can expand each project to examine its folders and files.
3.2.4. Building the Project
During the build process, you view the build commands and command-line output in the Eclipse Console view.
When the build process is complete, the following message appears in the Console view, under the C-Build [ <project name> ] title:
[ <project name> build complete]
If the project has a dependency on another project, such as a BSP or a user library, the SBT builds the dependency project first. This feature allows you to build an application and its BSP with a single command.
3.2.5. Configuring the FPGA
Before you can run your software, you must ensure that the correct hardware design is running on the FPGA. To configure the FPGA, you use the Intel® Quartus® Prime Programmer.
In the Windows operating system, you start the Intel® Quartus® Prime Programmer from the Nios II SBT for Eclipse, through the Nios II menu. In the Linux operating system, you start Intel® Quartus® Prime Programmer from the Intel® Quartus® Prime software.
The project directory for your hardware design contains an SRAM Object File (.sof) along with the .sopcinfo file. The .sof file contains the hardware design to be programmed in the FPGA.
3.2.6. Running the Project on Nios II Hardware
This section describes how to run a Nios II program using the Nios II SBT for Eclipse on Nios II hardware, such as an Intel FPGA development board.
If your project was created with version 10.1 or earlier of the Nios II SBT, you must re-import it to create the Nios II launch configuration correctly.
To run a software project, right-click the application project name, point to Run As, and click Nios II Hardware. To run a software project as a ModelSim simulation, right-click the application project name, point to Run As, and click Nios II ModelSim.
This command carries out the following actions:
- Creates a Nios II run configuration.
- Builds the project executable. If all target files are up to date, nothing is built.
- Establishes communications with the target, and verifies that the FPGA is configured with the correct hardware design.
- Downloads the Executable and Linking Format File (.elf) to the target memory
- Starts execution at the .elf entry point.
Program output appears in the Nios II Console view. The Nios II Console view maintains a terminal I/O connection with a communication device connected to the Nios II processor in the hardware system, such as a JTAG UART. When the Nios II program writes to stdout or stderr, the Nios II Console view displays the text. The Nios II Console view can also accept character input from the host keyboard, which is sent to the processor and read as stdin.
To disconnect the terminal from the target, click the Terminate icon in the Nios II Console view. Terminating only disconnects the host from the target. The target processor continues executing the program.
3.2.7. Debugging the Project on Nios II Hardware
This section describes how to debug a Nios II program using the Nios II SBT for Eclipse on Nios II hardware, such as an Intel FPGA development board.
To debug a software project, right-click the application project name, point to Debug As, and click Nios II Hardware. This command carries out the following actions:
- Creates a Nios II run configuration.
- Builds the project executable. If all target files are up to date, nothing is built.
- If debugging on hardware, establishes communications with the target, and verifies that the FPGA is configured with the correct hardware design.
- Downloads the .elf to the target memory.
- Sets a breakpoint at the top of main().
- Starts execution at the .elf entry point.
The Eclipse debugger with the Nios II plugins provides a Nios II perspective, allowing you to perform many common debugging tasks. Debugging a Nios II program with the Nios II plugins is generally the same as debugging any other C/C++ program with Eclipse and the CDT plugins.
For information about debugging with Eclipse and the CDT plugins, refer to the Eclipse help system.
3.2.7.1. List of Debugging Tasks with the Nios II SBT for Eclipse
- Controlling program execution with commands such as:
- Suspend (pause)
- Resume
- Terminate
- Step Into
- Step Over
- Step Return
- Setting breakpoints and watchpoints
- Viewing disassembly
- Instruction stepping mode
- Displaying and changing the values of local and global variables in the following formats:
- Binary
- Decimal
- Hexadecimal
- Displaying watch expressions
- Viewing and editing registers in the following formats:
- Binary
- Decimal
- Hexadecimal
- Viewing and editing memory in the following formats:
- Hexadecimal
- ASCII
- Signed integer
- Unsigned integer
- Viewing stack frames in the Debug view
3.2.7.1.1. Console View
3.2.7.1.2. Disconnecting the Terminal from the Target
3.2.7.2. Using the Altera Bytestream Console
The Intel FPGA bytestream console enables you to see output from the processor's stdout and stderr devices, and send input to its stdin device. The function of the Intel FPGA bytestream console is similar to the nios2-terminal command-line utility.
Open the Intel FPGA bytestream console in the Eclipse Console view the same way as any other Eclipse console, by clicking the Open Console button.
When you open the Intel FPGA bytestream console, the Bytestream Console Selection dialog box shows you a list of available bytestreams. This is the same set of bytestreams recognized by System Console. Select the bytestream connected to the processor you are debugging.
You can send characters to the processor's stdin device by typing in the bytestream console. Be aware that console input in buffered on a line-by-line basis. Therefore, the processor does not receive any characters until you press the Enter key.
3.2.7.3. Run Time Stack Checking And Exception Debugging
- Enable the Run Time Stack Checking in the BSP project from NIOS II SBT for Eclipce Nios® II BSP Editor. From the BSP project, right-click and navigate to Nios® II > BSP editor Settings > Advanced > hal > enable_run_time_stack_checking.
- Rebuild BSP and software.
- Ensure that the FPGA is configured.
- Start the Debug Session by navigating to Debug As > Nios® II Hardware.
- Run the Software.
3.2.7.3.1. Nios II Exception Debugging
When an exception is hit, the cause value in the Nios® II Exception Register can be decoded using the Nios® II Exceptions (In Decreasing Priority Order) table from the Nios® II Processor Reference Handbook.
3.2.7.3.2. Stack Overflow
- Check the current value of the stack pointer
- Compare this to the max stack size, which is stored in the Exception Temp (ET) Register
Example of function with stack checking code
___vfprintf_internal_r: 000002ec: addi sp,sp,-1308 000002f0: bgeu sp,et,0x2f8 <___vfprintf_internal_r+12> 000002f4: break 3
The bgeu and break 3 lines are what is added for the stack overflow checking. If the stack pointer has grown beyond its limits the break is called.
Recognizing and Debugging a Stack Overflow
When a stack overflow occurs, having registered an instruction-related exception handler helps you identify it by its behavior.
Default Instruction-Related Exception Handler
The default value for an instruction-related exception handler is when it is not registered.
How to Isolate the Cause of a Sigtrap
The Debugger breaks with sigtrap:
-
Use the thread view in the debug window and select the last state.
This is the highest number. The last thread is the actual call than overflowed.
-
Switch to instruction stepping mode in the debugger by pressing the i-> button
in the debug window, which opens the memory disassembly view.
If there has been a stack overflow the disassembly view should show execution pointing to a break3 after the stack check:
___vfprintf_internal_r: 000002ec: addi sp,sp,-1308 000002f0: bgeu sp,et,0x2f8 <___vfprintf_internal_r+12> 000002f4: break 3
- Check the value of sp and et which holds the max stack side in the Nios® II register view.
-
Move to the prior state in the debug window and re-check
sp vs et.
Figure 2. Nios® II Debug window
Custom Instruction-Related Exception Handler
For use outside the debugger, you can register your own instruction-related exception handler which is called when the break (or any exception) is seen.
On an exception, including overflow, the HAL calls the instruction-related exception handler, passing in the cause field from the exception register, and the address which caused the exception. At this point, it is up to you to decide what do.
For more information about how to register an instruction-related exception, refer to
3.2.8. Creating a Simple BSP
- The name
- The underlying hardware design
- The location
- The operating system and version
You can select the operating system only at the time you create the BSP. To change operating systems, you must create a new BSP by using the Additional arguments to the nios2-bsp script.
If you intend to run the project in the Nios® II ModelSim™ simulation environment, use the Additional arguments parameter to specify the location of the test bench simulation package descriptor file (.spd). The .spd file is located in the Intel® Quartus® Prime project directory. Specify the path as follows: --set QUARTUS_PROJECT_DIR=<relative path> .
- To access and modify basic BSP properties, right-click the BSP project, click Properties > Nios® II BSP Properties.
- To modify parameters and settings in detail using the Nios II BSP Editor, refer to Using the BSP Editor.
3.3. Makefiles and the Nios II SBT for Eclipse
Details of how each makefile is created and maintained vary depending on the project type, and on project options that you control. The authoritative specification of project contents is always the makefile, regardless how it is created or updated.
By default, the Nios® II SBT manages the list of source files in your makefile, based on actions you take in Eclipse. However, in the case of applications and libraries, you have the option to manage sources manually. Both styles of source management are discussed in the following sections.
3.3.1. Eclipse Source Management
You can examine and modify many makefile properties in the Nios® II Application Properties or Nios® II Library Properties dialog box. To open the dialog box, right-click the project, click Properties > Nios® II Application Properties or Properties > Nios® II Library Properties.
3.3.1.1. Modifying a Makefile with Eclipse Source Management
Modification | Where Modified |
---|---|
Specifying the application or user library name | Nios® II Application Properties or Nios® II Library Properties dialog box. |
Adding or removing source files | For more information, refer to the Eclipse help system. |
Specifying a path to an associated BSP | Project References dialog box. |
Specifying a path to an associated user library | Project References dialog box. |
Enabling, disabling or modifying compiler options | Nios® II Application Properties or Nios® II Library Properties dialog box. |
After the SBT has created a makefile, you can modify the makefile in the following ways:
- With the Nios® II SBT for Eclipse.
- With Nios® II SBT commands from the Nios® II Command Shell.
When modifying a makefile, the SBT preserves any previous nonconflicting modifications, regardless how those modifications were made.
After you modify a makefile with the Nios® II Command Shell, in Eclipse you must right-click the project and click Update linked resource to keep the Eclipse project view in step with the makefile.
When the Nios® II SBT for Eclipse modifies a makefile, it locks the makefile to prevent corruption by other processes. You cannot edit the makefile from the command line until the SBT has removed the lock.
If you want to exclude a resource (a file or a folder) from the Nios® II makefile temporarily, without deleting it from the project, you can use the Remove from Nios® II Build command. Right-click the resource and click Remove from Nios® II Build. When a resource is excluded from the build, it does not appear in the makefile, and Eclipse ignores it. However, it is still visible in the Project Explorer, with a modified icon. To add the resource back into the build, right-click the resource and click Add to Nios® II Build.
3.3.1.2. Absolute Source Paths and Linked Resources
An Eclipse linked resource can be either a file or a folder. With a linked folder, all source files in the folder and its subfolders are included in the build.
When you add a linked resource (file or folder) to your project, the SBT for Eclipse adds the file or folder to your makefile with an absolute path name. You might use a linked resource to refer to common source files in a fixed location. In this situation, you can move the project to a different directory without disturbing the common source file references.
A linked resource appears with a modified icon (green dot) in the Project Explorer, to distinguish it from source files and folders that are part of the project. You can use the Eclipse debugger to step into a linked source file, exactly as if it were part of the project.
You can reconfigure your project to refer to any linked resource either as an individual file, or through its parent folder. Right-click the linked resource and click Update Linked Resource.
You can use the Remove from Nios® II Build and Add to Nios® II Build commands with linked resources. When a linked resource is excluded from the build, its icon is modified with a white dot.
You can use Eclipse to create a path variable, defining the location of a linked resource. A path variable makes it easy to modify the location of one or more files in your project.
For information about working with path variables and creating linked resources, refer to the Eclipse help system.
3.3.2. User Source Management
Simply turn off Enable source management to convert the makefile to user source management. When Enable source management is off, you must update your makefile manually to add or remove source files to or from the project. The SBT for Eclipse makes no changes to the list of source files, but continues to manage all other project parameters and settings in the makefile.
3.3.2.1. Modifying a Makefile with User Source Management
In a makefile with user-managed sources, you can refer to source files with an absolute path. You might use an absolute path to refer to common source files in a fixed location. In this situation, you can move the project to a different directory without disturbing the common source file references.
Projects with user-managed sources do not support the following features:
- Linked resources
- The Add to Nios® II Build command
- The Remove from Nios® II Build command
Modification | Where Modified |
---|---|
Specifying the application or user library name | Nios® II Application Properties or Nios® II Library Properties dialog box |
Specifying a path to an associated BSP | Project References dialog box |
Specifying a path to an associated user library | Project References dialog box |
Enabling, disabling or modifying compiler options | Nios® II Application Properties or Nios® II Library Properties dialog box |
3.3.3. BSP Source Management
BSP makefiles must be managed by the SBT, either through the BSP Editor or through the SBT command-line utilities.
3.4. Using the BSP Editor
3.4.1. Tcl Scripting and the Nios II BSP Editor
You can also export a Tcl script from the BSP Editor, containing all the settings in an existing BSP. By studying such a script, you can learn about how BSP Tcl scripts are constructed.
3.4.2. Starting the Nios II BSP Editor
- Right-click an existing project, point to Nios® II , and click BSP Editor. The editor loads the BSP Settings File (.bsp) associated with your project, and is ready to update it.
- On the Nios® II menu, click Nios® II BSP Editor. The editor starts without loading a .bsp file.
- Right-click an existing BSP project and click Properties. In the Properties dialog box, select Nios® II BSP Properties > BSP Editor. The editor loads your .bsp file for update.
3.4.3. The Nios II BSP Editor Screen Layout
Below the console area is the Generate button. This button is enabled when the BSP settings are valid. It generates the BSP target files, as shown in the Target BSP Directory tab.
3.4.4. The Command Area
- The Main tab
- The Software Packages tab
- The Drivers tab
- The Linker Script tab
- The Enable File Generation tab
- The Target BSP Directory tab
Each tab allows you to view and edit a particular aspect of the .bsp, along with relevant command line parameters and Tcl scripts.
The settings that appear on the Main, Software Packages and Drivers tabs are the same as the settings you manipulate on the command line.
3.4.4.1. The Main Tab
- The path to the .sopcinfo file specifying the target hardware
- The processor name
- The operating system and version
- The BSP target directory—the destination for files that the SBT copies and creates for your BSP.
- BSP settings
BSP settings appear in a tree structure. Settings are organized into Common and Advanced categories. Settings are further organized into functional groups. The available settings depend on the operating system.
When you select a group of settings, the controls for those settings appear in the pane to the right of the tree. When you select a single setting, the pane shows the setting control, the full setting name, and the setting description.
3.4.4.2. The Software Packages Tab
At the top of the Software Packages tab is the software package table, listing each available software package. The table allows you to select the software package version, and enable or disable the software package.
The operating system determines which software packages are available.
Many software packages define settings that you can control in your BSP. When you enable a software package, the available settings appear in a tree structure, organized into Common and Advanced settings.
When you select a group of settings, the controls for those settings appear in the pane to the right of the tree. When you select a single setting, the pane shows the setting control, the full setting name, and the setting description.
Enabling and disabling software packages and editing software package settings can have a profound impact on BSP behavior. Refer to the documentation for the specific software package for details.
3.4.4.3. The Drivers Tab
At the top of the Drivers tab is the driver table, mapping components in the hardware system to drivers. The driver table shows components with driver support. Each component has a module name, module version, module class name, driver name, and driver version, determined by the contents of the hardware system. The table allows you to select the driver by name and version, as well as to enable or disable each driver.
When you select a driver version, all instances of that driver in the BSP are set to the version you select. Only one version of a given driver can be used in an individual BSP.
Many drivers define settings that you can control in your BSP. Available driver settings appear in a tree structure below the driver table, organized into Common and Advanced settings.
When you select a group of settings, the controls for those settings appear in the pane to the right of the tree. When you select a single setting, the pane shows the setting control, the full setting name, and the setting description.
Enabling and disabling device drivers, changing drivers and driver versions, and editing driver settings, can have a profound impact on BSP behavior. Refer to the relevant component documentation and driver information for details.
3.4.4.4. The Linker Script Tab
When you make a change to the memory configuration, the SBT validates your change.
3.4.4.4.1. Linker Section Mappings
- Add—Adds a linker section mapping to an existing linker region. The Add button opens the Add Section Mapping dialog box, where you specify a new section name and an existing linker region.
- Remove—Removes a mapping from a linker section to a linker region.
- Restore Defaults—Restores the section mappings to the default configuration set up at the time of BSP creation.
3.4.4.4.2. Linker Regions
You reassign a defined linker region to a different memory device by selecting a different device name in the Memory Device Name column. The Size and Offset columns are editable. You can also edit the list of linker regions using the following buttons located next to the linker region table:
- Add—Adds a linker region in unused space on any existing device. The Add button opens the Add Memory Region dialog box, where you specify the memory device, the new memory region name, the region size, and the region's offset from the device base address.
- Remove—Removes a linker region definition. Removing a region frees the region's memory space to be used for other regions.
- Add Memory Device—Creates a linker region representing a memory device that is outside the hardware system. The button launches the Add Memory Device dialog box, where you can specify the device name, memory size and base address. After you add the device, it appears in the linker region table, the Memory Device Usage Table dialog box, and the Memory Map dialog box. This functionality is equivalent to the add_memory_device Tcl command.
- Restore Defaults—restores the memory regions to the default configuration set up at the time of BSP creation.
- Memory Usage—Opens the Memory Device Usage Table. The Memory Device Usage Table allows you to view memory device usage by defined memory region. As memory regions are added, removed, and adjusted, each device's free memory, used memory, and percentage of available memory are updated. The rightmost column is a graphical representation of the device’s usage, according to the memory regions assigned to it.
-
Memory Map—Opens the Memory Map dialog box. The
memory map allows you to view a map of system memory in the processor address space. The Device table is a read-only reference showing
memories in the hardware system that are mastered by the selected processor. Devices are listed in memory address order.
To the right of the Device table is a graphical representation of the processor's memory space, showing the locations of devices in the table. Gaps indicate unmapped address space.
3.4.4.5. Enable File Generation Tab
3.4.4.6. Target BSP Directory Tab
It does not depict the actual file system, but rather the files and directories to be created or copied when the BSP is generated. Each software component, including the operating system, drivers, and software packages, specifies source code to be copied into the BSP target directory. The files are generated in the directory specified on the Main tab.
When you generate the BSP, existing BSP files are overwritten, unless you disable generation of the file in the Enable File Generation tab.
3.4.5. The Console Area
- The Information tab
- The Problems tab
- The Processing tab
3.4.5.1. The Information Tab
3.4.5.2. The Problems Tab
3.4.5.3. The Processing Tab
3.4.6. Exporting a Tcl Script
- Regenerate the BSP from the command line
- Recreate the BSP as a starting point for a new BSP
- Recreate the BSP on a different hardware platform
- Examine the Tcl script to improve your understanding of Tcl command usage
The exported Tcl script captures all BSP settings that you have changed since the previous time the BSP settings file was saved. If you export a Tcl script after creating a new BSP, the script captures all nondefault settings in the BSP. If you export a Tcl script after editing a pre-existing BSP, the script captures your changes from the current editing session.
To export a Tcl script, in the Tools menu, click Export Tcl Script, and specify a filename and destination path. The file extension is .tcl.
You can later run your exported script as a part of creating a new BSP.
3.4.7. Creating a New BSP
In this dialog box, you specify the following parameters:
- The .sopcinfo file defining the hardware platform.
- The CPU name of the targeted processor.
- The BSP type and version.
You can select the operating system only at the time you create the BSP. To change operating systems, you must create a new BSP.
- The operating system version.
- The name of the BSP settings file. It is created with file extension .bsp.
- Absolute or relative path names in the BSP settings file. By default, relative paths are enabled for filenames in the BSP settings file.
- An optional Tcl script that you can run to supply additional settings.
Normally, you specify the path to your .sopcinfo file relative to the BSP directory. This enables you to move, copy and archive the hardware and software files together. If you browse to the .sopcinfo file, or specify an absolute path, the Nios II BSP Editor offers to convert your path to the relative form.
3.4.7.1. Using a Tcl Script in BSP Creation
This feature allows you to perform the following tasks:
- Recreate an existing BSP as a starting point for a new BSP
- Recreate a BSP on a different hardware platform
- Include custom settings common to a group of BSPs
The Tcl script can be created by hand or exported from another BSP.
3.4.8. BSP Validation Errors
If your modifications to the underlying hardware design result in BSP validation errors, the best practice is to update or recreate the BSP. Updating and recreating BSPs is very easy with the BSP Editor.
If you recreate your BSP, you might find it helpful to capture your old BSP settings by exporting them to a Tcl script. You can edit the Tcl script to remove any settings that are incompatible with the new hardware design.
3.5. Run Configurations in the SBT for Eclipse
3.5.1. Opening the Run Configuration Dialog Box
- You can right-click an application, point to Run As, and click Run Configurations.
- You can right-click an application, point to Debug As, and click Debug Configurations.
Depending on which way you opened the run configuration dialog box, the title is either Run Configuration or Debug Configuration. However, both views show the same run configurations.
Each run configuration is presented on several tabs. This section describes each tab.
3.5.2. The Project Tab
- Specify the processor on which to execute the program (if the hardware design provides multiple processors)
- Specify the device to use for standard I/O
- Specify the expected location, timestamp and value of the system ID
- Specify the path to the Intel® Quartus® Prime JTAG Debugging Information File (.jdi)
- Enable or disable profiling
The Nios II SBT for Eclipse sets these parameters to reasonable defaults. Do not modify them unless you have a clear understanding of their effects.
3.5.3. The Target Connection Tab
- Select the cable, if more than one cable is available
- Allow software to run despite a system ID value or timestamp that differs from the hardware
- Reset the processor when the software is downloaded
The System ID Properties button allows you to examine the system ID and timestamp in both the .elf file and the hardware. This can be helpful when you need to analyze the cause of a system ID or timestamp mismatch.
3.5.4. The Debugger Tab
3.6. Optimizing Project Build Time
With Nios® II Gen 2, the Windows® host compile and build time performance has improved. For example, it is now three times faster to build the webserver example.
3.7. Importing a Command-Line Project
Your command-line C/C++ application, and its associated BSP, is created on the command line. Any Nios® II SBT command-line project is ready to import into the Nios® II SBT for Eclipse. No additional preparation is necessary.
3.7.1. Nios II Command-Line Projects
- Command-line C/C++ application project
- Command-line BSP project
- Command-line user library project
You can edit, build, debug, and manage the settings of an imported project exactly the same way you edit, build, debug, and manage the settings of a project created in Nios II SBT for Eclipse.
3.7.2. Importing through the Import Wizard
You can continue to develop project code in your SBT project after importing the project into Eclipse. You can edit source files and rebuild the project, using the SBT either in Eclipse or on the command line.
3.7.3. Road Map
- Import a command-line C/C++ application
- Import a supporting project
- Debug a command-line C/C++ application
- Edit command-line C/C++ application code
When importing a project, the SBT for Eclipse might make some minor changes to your makefile. If the makefile refers to a source file located outside the project directory tree, the SBT for Eclipse treats that file as a linked resource. However, it does not add or remove any source files to or from your makefile.
When you import an application or user library project, the Nios® II SBT for Eclipse allows you to choose Eclipse source management or user source management. Unless your project has an unusual directory structure, choose Eclipse source management, to allow the SBT for Eclipse to automatically maintain your list of source files.
You debug and edit an imported project exactly the same way you debug and edit a project created in Eclipse.
3.7.4. Import a Command-Line C/C++ Application
- Start the Nios® II SBT for Eclipse.
- On the File menu, click Import. The Import dialog box appears.
- Expand the Nios® II Software Build Tools Project folder, and select Import Nios® II Software Build Tools Project.
- Click Next. The File Import wizard appears.
- Click Browse and locate the directory containing the C/C++ application project to import.
- Click OK. The wizard fills in the project path.
-
Specify the project name in the Project name box.
Note: You might see a warning saying "There is already a .project file at: <path>". This warning indicates that the directory already contains an Eclipse project. Either it is an Eclipse project, or it is a command-line project that is already imported into Eclipse. If the project is already in your workspace, do not re-import it.
-
Click Finish. The wizard imports the application project.
After you complete these steps, the Nios® II SBT for Eclipse can build, debug, and run the complete program, including the BSP and any libraries. The Nios® II SBT for Eclipse builds the project using the SBT makefiles in your imported C/C++ application project. Eclipse displays and steps through application source code exactly as if the project were created in the Nios® II SBT for Eclipse. However, Eclipse does not have direct information about where BSP or user library code resides. If you need to view, debug or step through BSP or user library source code, you need to import the BSP or user library.
3.7.4.1. Importing a Project with Absolute Source Paths
3.7.5. Import a Supporting Project
If you do not need BSP or user library source code visible in the debugger, you can skip this task, and proceed to debug your project exactly as if you had created it in Eclipse.
If you have several C/C++ applications based on one BSP or user library, import the BSP or user library once, and then import each application that is based on the BSP or user library. Each application's makefile contains the information needed to find and build any associated BSP or libraries.
3.7.6. User-Managed Source Files
With user source management, Eclipse never makes any changes to the list of source files in your makefile. However, the SBT for Eclipse manages all other project parameters and settings, just as with any other Nios® II software project.
If your makefile refers to a source file with an absolute path, when you import with user source management, the absolute path is untouched, like any other source path. You might use an absolute path to refer to common source files in a fixed location. In this situation, you can move the project to a different directory without disturbing the common source file references.
User source management is not available with BSP projects. BSP makefiles are based on the operating system, BSP settings, selected software packages, and selected drivers. You do not specify BSP source files directly.
3.8. Packaging a Library for Reuse
- Create a Nios® II user library
- Create a Nios® II application project based on the user library
3.8.1. Creating the User Library
- In the File menu, point to New and click Nios® II Library.
- Type a project name, for example test_lib.
- For Location, browse to the directory containing your library source files ( .c and .h).
- Click Finish.
- Build the project to create the .a file (in this case libtest_lib.a).
3.8.2. Using the Library
- Create your Nios® II application project.
- To set the library path in the application project, right-click the project, and click Properties.
- Expand Nios® II Application Properties. In Nios® II Application Paths, next to Application include directories, click Add and browse to the directory containing your library header files.
- Next to Application library directories, click Add and browse to the directory containing your .a file.
- Next to Library name, click Add and type the library project name you selected when you created your user library.
- Click OK.
- Build your application.
As this example shows, the .c source files are not required to build the application project. To hand off the library to another engineer or organization for reuse, you provide the following files:
- Nios® II library archive file (.a)
- Software header files (.h)
3.9. Creating a Software Package
This section contains an example illustrating the steps necessary to include any software package into a Nios II BSP.
To create and exercise the example software package, perform the following steps:
- Locate the ip directory in your Intel FPGA Complete Design Suite installation. For example, if the Intel FPGA Complete Design Suite version 14.1 is installed on the Windows operating system, the directory might be c:\altera\14.1\ip. Under the ip directory, create a directory for the software package. For simplicity, this section refers to this directory as <example package>.
- In <example package>, create a subdirectory named EXAMPLE_SW_PACKAGE. In <example package>/EXAMPLE_SW_PACKAGE, create two subdirectories named inc and lib.
-
In <example
package>/EXAMPLE_SW_PACKAGE/inc, create a new header file named
example_sw_package.h
containing the following
code:
/* Example Software Package */ void example_sw_package(void);
-
In <example package>/EXAMPLE_SW_PACKAGE/lib,
create a new C source file named example_sw_package.c
containing the following code:
/* Example Software Package */ #include <stdio.h> #include "..\inc\example_sw_package.h" void example_sw_package(void) { printf ("Example Software Package. \n"); }
-
In <example
package>, create a new Tcl script file named example_sw_package_sw.tcl
containing the following
code:
# # example_sw_package_sw.tcl # # Create a software package known as "example_sw_package" create_sw_package example_sw_package # The version of this software set_sw_property version 14.1 # Location in generated BSP that sources should be copied into set_sw_property bsp_subdirectory Example_SW_Package # # Source file listings... # # C/C++ source files #add_sw_property c_source EXAMPLE_SW_PACKAGE/src/my_source.c # Include files add_sw_property include_source EXAMPLE_SW_PACKAGE/inc/example_sw_package.h # Lib files add_sw_property lib_source EXAMPLE_SW_PACKAGE/lib/libexample_sw_package_library.a # Include paths for headers which define the APIs for this package # to share w/ app & bsp # Include paths are relative to the location of this software # package tcl file add_sw_property include_directory EXAMPLE_SW_PACKAGE/inc # This driver supports HAL & UCOSII BSP (OS) types add_sw_property supported_bsp_type HAL add_sw_property supported_bsp_type UCOSII # Add example software package system.h setting to the BSP: add_sw_setting quoted_string system_h_define \ example_sw_package_system_value EXAMPLE_SW_PACKAGE_SYSTEM_VALUE 1 \ "Example software package system value" # End of file
- In the SBT for Eclipse, create a Nios II application and BSP project based on the Hello World template. Set the application project name to hello_example_sw_package.
-
Create a new C file named hello_example_sw_package.c in the
new application
project
containing the following code:
/* * "Hello World" example. * * This example prints 'Hello from Nios II' to the STDOUT stream. It also * tests inclusion of a user software package. */ #include <stdio.h> #include "example_sw_package.h" int main() { printf("Hello from Nios II!\n"); example_sw_package(); return 0; }
- Delete hello_world.c from the hello_example_sw_package application project.
- In the File menu, point to New and click Nios II Library
- Set the project name to example_sw_package_library.
-
For Location, browse to
<example
package>\EXAMPLE_SW_PACKAGE\lib
Note: Building the library here is required, because the resulting .a is referenced here by example_sw_package_sw.tcl.
- Click Finish.
- Build the example_sw_package_library project to create the libexample_sw_package_library.a library archive file.
- Right-click the BSP project, point to Nios II, and click BSP Editor to open the BSP Editor.
-
In the Software Packages tab, find example_sw_package in the software package table, and enable
it.
If there are any errors in a software package's *_sw.tcl file, such as an incorrect path that causes a file to not be found, the software package does not appear in the BSP Editor.
- Click the Generate button to regenerate the BSP. On the File menu, click Save to save your changes to settings.bsp.
- In the File menu, click Exit to exit the BSP Editor.
- Build the hello_example_sw_package_bsp BSP project.
-
Build the hello_example_sw_package application project.
hello_example_sw_package.elf is ready to download and execute.
3.10. Programming Flash in Altera Embedded Systems
- Program code
- Program data
- FPGA configuration data
- File systems
Flash programmer tools allow you to program software, FPGA configuration, and application-specific binary data into flash memory devices. The tools support combining these different types of data so that they can be stored in a single flash device.
In Intel® Quartus® Prime Standard Edition, the Nios II SBT for Eclipse provides the Nios II flash programmer GUI-based tool and associated utilities, to help you manage and program the contents of flash memory. The sections below describe how to use these tools.
- Start the Intel® Quartus® Prime software. The Intel® Quartus® Prime Pro Edition window appears.
- Select Tools > Programmer. The Programmer window appears.
3.10.1. Starting the Flash Programmer
When you first open the flash programmer, no controls are available until you open or create a Flash Programmer Settings File (.flash-settings).
3.10.2. Creating a Flash Programmer Settings File
You create a flash programmer settings file through the File menu. When you click New, the New Flash Programmer Settings File dialog box appears.
3.10.2.1. Specifying the Hardware Configuration
You specify the hardware configuration by opening a .sopcinfo file. You can locate the .sopcinfo file in either of two ways:
- Browse to a BSP settings file. The flash programmer finds the .sopcinfo file associated with the BSP.
- Browse directly to a .sopcinfo file.
Once you have identified a hardware configuration, details about the target hardware appear at the top of the Nios II flash programmer screen.
Also at the top of the Nios II flash programmer screen is the Hardware Connections button, which opens the Hardware Connections dialog box. This dialog box allows you to select a download cable, and control system ID behavior.
3.10.3. The Flash Programmer Screen Layout
Below the console area is the Start button. This button is enabled when the flash programmer parameters are valid. It starts the process of programming flash.
3.10.4. The Command Area
The Add and Remove buttons allow you to create and edit the list of files to be programmed in the flash memory component.
The File generation command box shows the commands used to generate the Motorola S-record Files (.flash) used to program flash memory.
The File programming command box shows the commands used to program the .flash files to flash memory.
The Properties button opens the Properties dialog box, which allows you to view and modify information about an individual file. In the case of a .elf, the Properties button provides access to the project reset address, the flash base and end addresses, and the boot loader file (if any).
The flash programmer determines whether a boot loader is required based on the load and run locations of the .text section. You can use the Properties dialog box to override the default boot loader configuration.
3.10.5. The Console Area
- The Information tab
- The Problems tab
- The Processing tab
3.10.5.1. The Information Tab
3.10.5.2. The Problems Tab
3.10.5.3. The Processing Tab
3.10.6. Saving a Flash Programmer Settings File
3.10.7. Flash Programmer Options
Through the Options menu, you can control several global aspects of flash programmer behavior, as described in this section.
3.10.7.1. Staging Directories
3.10.7.2. Generate Files
3.10.7.3. Program Files
3.10.7.4. Erase Flash Before Programming
3.10.7.5. Run From Reset After Programming
3.11. Creating Memory Initialization Files
Creating a Hexadecimal (Intel-Format) File (.hex) is a necessary intermediate step in creating such a .sof file. The Nios® II SBT for Eclipse can create .hex files and other memory initialization formats.
To generate correct memory initialization files, the Nios® II SBT needs details about the physical memory configuration and the types of files required. Typically, this information is specified when the hardware system is generated.
3.11.1. Generate Memory Initialization Files
- Right-click the application project.
- Point to Make targets and click Build to open the Make Targets dialog box.
- Select mem_init_generate.
- Click Build. The makefile generates a separate file (or files) for each memory device. It also generates a Intel® Quartus® Prime IP File (.qip). The .qip file tells the Intel® Quartus® Prime software where to find the initialization files.
- Add the .qip file to your Intel® Quartus® Prime project.
- Recompile your Intel® Quartus® Prime project.
3.11.2. Generate Memory Initialization Files by the Legacy Method
- Right-click the application project.
- Point to Make targets and click Build to open the Make Targets dialog box.
- Select mem_init_install.
- Click Build. The makefile generates a separate file (or files) for each memory device. The makefile inserts the memory initialization files directly in the Intel® Quartus® Prime project directory for you.
- Recompile your Intel® Quartus® Prime project.
3.11.3. Memory Initialization Files for User-Defined Memories
You specify memory device information when you add the user-defined memory device to your BSP. The device information persists in the BSP settings file, allowing you to regenerate memory initialization files at any time, exactly as if the memory device were part of the hardware system.
- The physical memory width. The device’s name in the hardware system.
- The memory initialization file parameter name. Every memory device can have an HDL parameter specifying the name of the initialization file. The Nios® II ModelSim launch configuration overrides the HDL parameter to specify the memory initialization filename. When available, this method is preferred for setting the memory initialization filename.
- The Mem init filename parameter can be used in Nios® II systems as an alternative method of specifying the memory initialization filename. The Mem init filename parameter directly overrides any filename specified in the HDL.
- Connectivity to processor master ports. These parameters are used when creating the linker script.
- The memory type: volatile, CFI flash or EPCS flash.
- Byte lanes.
- You can also enable and disable generation of the following memory
initialization file types:
- .hex file
- .dat and .sym files
- .flash file
3.11.3.1. Specifying the Memory Device Information in the Advanced Tab
On the Advanced tab, you can control the following memory characteristics:
- The physical memory width.
- The device's name in the hardware system.
- The memory initialization file parameter name. Every memory device can have an HDL parameter specifying the name of the initialization file. The Nios® II ModelSim launch configuration overrides the HDL parameter to specify the memory initialization filename. When available, this method is preferred for setting the memory initialization filename.
- The Mem init filename parameter can be used in Nios® II systems as an alternative method of specifying the memory initialization filename. The Mem init filename parameter directly overrides any filename specified in the HDL.
- Connectivity to processor master ports. These parameters are used when creating the linker script.
- The memory type: volatile, CFI flash or EPCS flash.
- Byte lanes.
- You can also enable and disable generation of the following memory initialization file
types:
- .hex file
- .dat and .sym files
- .flash file
3.12. Running a Nios II System with ModelSim
3.12.1. Using ModelSim with an SOPC Builder-Generated System
If your hardware system was generated by SOPC Builder, running a software project in ModelSim is very similar to running it on Nios® II hardware.
To run a Nios® II software project in ModelSim, right-click on the application project name, point to Run As, and click Nios® II ModelSim.
To debug a software project in ModelSim, right-click on the application project name, point to Debug As, and click Nios® II ModelSim.
3.12.2. Using ModelSim with a Qsys-Generated System
For more information, refer to the Intel® Quartus® Prime Standard Edition Handbook Volume 1: Design and Synthesis Handbook.
3.12.2.1. Preparing your Software for ModelSim
-
Create your software project.
If you need to initialize a user-defined memory, you must take special steps to create memory initialization files correctly.
- Build your software project.
-
Create a ModelSim launch configuration with the following steps:
- Right-click the application project name, point to Run As, and click Run Configurations. In the Run Configurations dialog box, select Nios II ModelSim, and click the New button.
- In the Main tab, ensure that the correct software project name and .elf file are selected.
- Click Apply to save the launch configuration.
-
Click Close to close the dialog box.
If you are simulating multiple processors, create a launch configuration for each processor, and create a launch group.
- Open the run configuration you previously created. Click Run. The Nios II SBT for Eclipse performs a make mem_init_generate command to create memory initialization files, and launches ModelSim.
- At the ModelSim command prompt, type ldr.
3.12.2.2. Potential Error Message
When you create the launch configuration, you might see the following error message:
SEVERE: The Intel® Quartus® Prime project location has not been set in the ELF section. You can manually override this setting in the launch configuration's ELF file 'Advanced' properties page.
3.12.2.3. Nios II GCC Tool chain upgrade from GCC 4.1.2 to GCC 4.7.3
- GCC 4.8.3 in 14.1
- GCC 4.9.1 in 15.0
3.12.2.3.1. Nios II specific changes
- Use __buildin_custom_* instead of -mcustom-* or #pragma to reliably generate Nios® II Floating Point Custom Instructions (FPCI), independent of compiler optimization level and command line flags.
- To use -mcustom-* or #pragma for
Nios® II
Floating Point Custom Instructions (FPCI):
- The -ffinite-math-only flag must be used to generate fmins and fmax FPCI
- The optimization (non -O0 flag) must be used to generate fsqrts FPCI
- Users implementing transcendental functions in hardware must use the -funsafe-math-optimizations flag to generate the FPCI for the transcendental functions fsins(), fcoss(), ftans(), fatans(), fexps(), flogs() and corresponding double-precision functions.
- The Pragma format has changed from eg. #pragma custom_fadds 253 to #pragma GCC target("custom-fadds=253") and function attributes provide an alternative format __attribute__((target("custom-fadds=253"))).
- Use the -mel/-meb flags instead of -EL/-EB for endian settings. Software Build Tool for Eclipse (SBTE) users must regenerate the BSP for this setting to take effect.
- The -mreverse-bitfields flag and reverse_bitfields pragma are no longer supported.
- The -fstack-check flag must be used instead of -mstack-check to enable stack checking.
3.12.2.3.2. GCC changes and enhancements
- The -Wa,-relax-all flag in nios2-elf-gcc GCC 4.7.3 supports function calls and programs exceeding the 256 MB limit.
- When used with optimization, inline assembly code with the asm operator needs to declare values imported from C and exported back to C, using the mechanisms described on the "Exteded Asm - Assembler Instructions with C Expression Operands" page.
- Pre-standard C++ headers are not supported in GCC 4.7.3. Replace pre-standard C++ with standard C++ eg. #include <iostream.h>, cout, endl with #include <iostream>, std::cout and std::endl, respectively.
- The compile flag -Wl,--defsym foo=bar where bar is an undefined symbol, generates error at the linker level in GCC 4.7.3. GCC 4.1.2 does not include this check.
3.13. Eclipse Usage Notes
If you launch the Nios® II Software Build Tools for Eclipse from the Nios® II command shell, you cannot pause execution of the Nios® II application when debugging the application. Running the program in this way closes the GDB connection to the target, leaving the processor running. This is caused by running Eclipse from the Cygwin environment.
To ensure that the pause button works, launch the Nios II Software Build Tool for Eclipse either from Platform Designer or directly from your operating system's Start menu.
3.13.1. Configuring Application and Library Properties
To open the appropriate properties tab, right-click the application or library project and click Properties. Depending on the project type, Nios® II Application Properties or Nios® II Library Properties tab appears in the list of tabs. Click the appropriate Properties tab to open it.
3.13.1.1. Comparing the Nios II Application Properties and Nios II Library Properties tabs
- The name of the target .elf file (application project only)
- The library name (library project only)
- A list of symbols to be defined in the makefile
- A list of symbols to be undefined in the makefile
- A list of assembler flags
- Warning level flags
- A list of user flags
- Generation of debug symbols
- Compiler optimization level
- Generation of object dump file (application project only)
- Source file management
- Path to associated BSP (required for application, optional for library)
3.13.2. Configuring BSP Properties
3.13.3. Exclude from Build Not Supported
This behavior differs from the behavior of the Nios II SBT for Eclipse in version 9.1.
3.13.4. Selecting the Correct Launch Configuration Type
3.13.5. Target Connection Options
- Disable 'Nios II Console' view
- Ignore mismatched system ID
- Ignore mismatched system timestamp
- Download ELF to selected target system
- Start processor
- Reset the selected target system
3.13.6. Renaming Nios II Projects
- Right-click the project and click Rename.
- Type the new project name.
-
Right-click the project and click Refresh.
If you neglect to refresh the project, you might see the following error message when you attempt to build it:
Resource <original_project_name> is out of sync with the system
3.13.7. Running Shell Scripts from the SBT for Eclipse
To run shell scripts from the SBT for Eclipse, execute the following steps:
- Start the Nios® II Command Shell.
-
Start the
Nios® II SBT for Eclipse by typing the following command:
eclipse-nios2
You must start the SBT for Eclipse from the command line in both the Linux and Windows operating systems, to set up the correct shell environment.
- From the Eclipse Run menu, select to External Tools > External Tools Configurations.
- Create a new tools configuration, or open an existing tools configuration.
-
On the Main tab, set Location and Argument.
Table 5. Location and Argument to Run Shell Script from Eclipse Platform Location Argument Windows ${env_var:QUARTUS_ROOTDIR}\bin\cygwin\bin\sh.exe -c " <script name> <script args>" Linux ${env_var:SOPC_KIT_NIOS2}/bin/ <script name> <script args> Table 6. Location and Argument Values Used to Run elf2hex --help from Eclipse Platform Location Argument Windows ${env_var:QUARTUS_ROOTDIR}\bin\cygwin\bin\sh.exe -c "elf2hex --help" Linux ${env_var:SOPC_KIT_NIOS2}/bin/elf2hex --help -
On the Build tab, ensure that Build before launch and its related options are set appropriately.
By default, a new tools configuration builds all projects in your workspace before executing the command. This might not be the desired behavior.
- Click Run. The command executes in the Nios® II Command Shell, and the command output appears in the Eclipse Console tab.
3.13.8. Must Use Nios II Build Configuration
3.13.9. CDT Limitations
The following tables describe the Eclipse CDT features not supported by the Nios® II plugins. The features listed in the left column are supported by the Eclipse CDT plugins, but are not supported by Nios® II plugins; and the right column lists alternative features supported by the Nios® II plugins.
Unsupported CDT Feature | Alternative Nios II Feature |
---|---|
C/C++
|
To create a new
project, use one of the following
Nios® II wizards:
|
Unsupported CDT Feature | Alternative Nios II Feature |
---|---|
|
The Nios® II plugins only support a single build configuration. This feature is supported only at the top of main(). |
Unsupported CDT Feature | Alternative Nios II Feature |
---|---|
Right-click source files | Use Remove from Nios® II Build and Add to Nios® II Build. |
Unsupported CDT Feature | Alternative Nios II Feature |
---|---|
C/C++ Build
|
By default, the Nios® II SBT generates makefiles automatically. The build location is determined with the Nios® II Application Properties or Nios® II BSP Properties dialog box. To change the toolchain, use the Current tool chain option. |
C/C++ General
|
The Nios® II plugins only support a single build configuration. Use Nios® II Application Properties and Nios® II Application Paths. |
Unsupported CDT Feature | Alternative Nios® II Feature |
---|---|
C/C++
|
The Nios® II plugins only support a single build configuration. The Nios® II plugins only support a single build configuration. |
3.13.10. Enhancements for Build Configurations in SBT and SBT for Eclipse
The SBT command line tools nios2-app-update-make and nios2-lib-update-makefile now support six new options specifically for handling build configurations, which are fully backwards compatible even if it is unused and omitted.
For SBT for Eclipse, a few GUI options are added:
- Dropdown combo box showing selected build config
- Button for managing build configs (add/remove/activate)
3.13.10.1. Build Configurations in SBT
These command line options are:
Option | Description |
---|---|
--add-build-config <config> <base> |
Adds a new build configuration with the name <config>, initializes the new build configuration using an existing build configuration named <base>. <base> is optional and defaults to the active configuration. <base> is always ignored if only one build configuration is available. |
--remove-build-config <config> |
Removes an existing build configuration. No effect if only one build configuration is available. |
--list-build-config <config> |
Returns name of all build configurations. Returns empty string if only one build configuration is available. |
--get-active-build-config |
Returns the name of active build configuration. Returns empty string if only one build configuration is available. |
--set-active-build-config <config> |
Set the build configuration named <config> active. No effect if only one build configuration is available. |
--build-config <config> |
Only use (read or modify) the build configuration named <config> but do not set it as the active build configuration. No effect if only one build configuration is available. |
3.13.10.2. Build Configurations in SBT for Eclipse
The following shows how the application properties page looks with the new build configuration options highlighted in red:

Clicking on the Managed Configurations button shows the following dialog for adding, removing, and activating build configurations:

4. Getting Started from the Command Line
4.1. Advantages of Command-Line Software Development
- You can invoke the command line tools from custom scripts or other tools that you might already use in your development flow.
- On a command line, you can run several Tcl scripts to control the creation of a board support package (BSP).
- You can use command line tools in a bash script to build several projects at once.
The Nios® II SBT command-line interface is designed to work in the Nios® II Command Shell.
4.2. Outline of the Nios II SBT Command-Line Interface
- Command-line utilities
- Command-line scripts
- Tcl commands
- Tcl scripts
These elements work together in the Nios® II Command Shell to create software projects.
4.2.1. Utilities
For more information about the command-line utilities provided by the Nios® II SBT, refer to “Intel FPGA-Provided Development Tools” in the Nios® II Software Build Tools section.
4.2.2. Scripts
Command | Summary |
---|---|
nios2-bsp | Creates or updates a BSP |
create-this-app | Creates a software example and builds it |
create-this-bsp | Creates a BSP for a specific hardware design example and builds it |
4.2.2.1. nios2-bsp
Usage
nios2-bsp <bsp-type> <bsp-dir> [<sopc>] [<override>]...
Options
- <bsp-type>: hal or ucosii .
- <bsp-dir>: Path to the BSP directory.
- <sopc>: The path to the .sopcinfo file or its directory.
- <override>: Options to override defaults.
Description
The nios2-bsp script calls nios2-bsp-create-settings or nios2-bsp-update-settings to create or update a BSP settings file, and the nios2-bsp-generate-files command to create the BSP files. The Nios II Embedded Design Suite (EDS) supports the following BSP types:
- hal
- ucosii
BSP type names are case-insensitive.
This utility produces a BSP of <bsp-type> in <bsp-dir>. If the BSP does not exist, it is created. If the BSP already exists, it is updated to be consistent with the associated hardware system.
The default Tcl script is used to set the following system-dependent settings:
- stdio character device
- System timer device
- Default linker memory
- Boot loader status (enabled or disabled)
If the BSP already exists, nios2-bsp overwrites these system-dependent settings.
The default Tcl script is installed at <Nios II EDS install path>/sdk2/bin/bsp-set-defaults.tcl
When creating a new BSP, this utility runs nios2-bsp-create-settings, which creates settings.bsp in <bsp-dir>.
When updating an existing BSP, this utility runs nios2-bsp-update-settings, which updates settings.bsp in <bsp-dir>.
After creating or updating the settings.bsp file, this utility runs nios2-bsp-generate-files, which generates files in <bsp-dir>
Required arguments:
-
<bsp-type>: Specifies the type of BSP. This argument is ignored when updating a BSP. This
argument is case-insensitive. The nios2-bsp script supports the following values of <bsp-type>:
- hal
- ucosii
- <bsp-dir>: Path to the BSP directory. Use "." to specify the current directory.
Optional arguments:
- <sopc>: The path name of the .sopcinfo file. Alternatively, specify a directory containing a .sopcinfo file. In the latter case, the tool finds a file with the extension .sopcinfo. This argument is ignored when updating a BSP. If you omit this argument, it defaults to the current directory.
-
<override>: Options to override defaults. The nios2-bsp
script passes most overrides to nios2-bsp-create-settings or nios2-bsp-update-settings. It also passes the --silent, --verbose, --debug, and --log options to nios2-bsp-generate-files.
nios2-bsp passes the following overrides to the default Tcl script:
-
--default_stdio
<device>|none|DONT_CHANGE
Specifies stdio device.
-
--default_sys_timer <device>|none|DONT_CHANGE
Specifies system timer device.
-
--default_memory_regions DONT_CHANGE
Suppresses creation of new default memory regions when updating a BSP. Do not use this option when creating a new BSP.
-
--default_sections_mapping <region>|DONT_CHANGE
Specifies the memory region for the default sections.
-
--use_bootloader 0|1|DONT_CHANGE
Specifies whether a boot loader is required.
On a preexisting BSP, the value DONT_CHANGE prevents associated settings from changing their current value.
-
--default_stdio
<device>|none|DONT_CHANGE
If no command-line arguments are specified, this command returns an exit value of 1 and sends a help message to stderr.
4.2.2.2. create-this-app
The create-this-app script takes no command-line arguments. Your current directory must be the same directory as the create-this-app script. The exit value is zero on success and one on error.
4.2.2.3. create-this-bsp
The create-this-bsp script takes no command-line arguments. Your current directory must be the same directory as the create-this-bsp script. The exit value is zero on success and one on error.
4.2.3. Tcl Commands
4.2.4. Tcl Scripts
4.2.5. The Nios II Command Shell
For more information about GCC toolchains, refer to “Intel FPGA-Provided Development Tools” in the " Nios® II Software Build Tools" section.
4.2.5.1. Starting the Nios II Command Shell
- In the Windows operating system, on the Start menu, point to Programs > Intel FPGA > Nios II EDS <version>,and click Nios II <version> Command Shell :.
- In the Linux operating system, in a command shell, change directories to <Nios II EDS install path>, and type the command nios2_command_shell.sh.
4.2.5.2. Auto-Executing a Command in the Nios II Command Shell
- In the Windows operating system, execute
the following command:
“<Nios II EDS install path>/Nios II Command Shell.bat“ <command>
- In the Linux operating system, execute the
following command:
<Nios II EDS install path>/nios2_command_shell.sh <command>
For example, in Windows, to run an automated build, you might execute the following command:
“<Nios II EDS install path>/Nios II Command Shell.bat“ custom_build.sh
The Nios II Command Shell startup script (Nios II Command Shell.bat or nios2_command_shell.sh) makes no special assumptions about its initial environment. You can use the Nios II Command Shell with auto-execution from any environment that accepts commands native to your host operating system. For example, in Linux you can use crontab to schedule a job to run in the Nios II Command Shell at a later time.
4.3. Getting Started in the SBT Command Line
The Nios II SBT includes a number of scripts that demonstrate how to combine command utilities to obtain the results you need. This tutorial uses a create-this-app script as an example.
4.3.1. What You Need
To complete this tutorial, you must have the following:
- Intel FPGA Quartus Prime development software, version 8.0 or later. The software must be installed on a Windows or Linux computer that meets the Quartus Prime minimum requirements.
- The Intel FPGA Nios II Embedded Design Suite (EDS), version 8.0 or later.
- An Intel FPGA development board.
- A download cable such as the Intel FPGA USB-Blaster™ cable.
You run the Nios II SBT commands from the Nios II Command Shell.
4.3.2. Creating hello_world for an Altera Development Board
- Start the Nios® II Command Shell.2
- Create a working directory for your hardware and software projects. The following steps refer to this directory as <projects>.
-
Change to the <projects>
directory by typing the following command:
cd <projects>
- Locate a Nios® II hardware example for your Intel FPGA development board. For example, if you have a Stratix® IV GX FPGA Development Kit, you might select < Nios® II EDS install path>/examples/verilog/niosII_stratixIV_4sgx230/triple_speed_ethernet_design.
-
Copy the hardware example to your
<projects> working directory, using a command such as the following:
cp -R /altera/100/nios2eds/examples/verilog/niosII_stratixIV_4sgx230/triple_speed_ethernet_design .
-
Ensure that the working directory and
all subdirectories are writable by typing the following command:
chmod -R +w
- The <projects> directory contains a subdirectory named software_examples/app/hello_world. The following steps refer to this directory as <application>.
-
Change to the <application>
directory by typing the following command:
cd <application>
-
Type the following command to create
and build the application:
./create-this-app
The create-this-app script copies the application source code to the <application> directory, runs nios2-app-generate-makefile to create a makefile (named Makefile), and then runs make to create an Executable and Linking Format File (.elf). The create-this-app script finds a compatible BSP by looking in <projects> /software_examples/bsp. In the case of hello_world, it selects the hal_default BSP.
To create the example BSP, create-this-app calls the create-this-bsp script in the BSP directory.
4.3.3. Running hello_world on an Altera Development Board
- Start the Nios® II Command Shell.
-
Download the SRAM Object File
(.sof) for
the Quartus
Prime
project to the
Intel
FPGA development board.
This step configures the FPGA on the Intel FPGA development board.
Note:The .sof file resides in <projects>, along with your Intel® Quartus® Prime Project File (.qpf). You download it by typing the following commands:- cd <projects>
- nios2-configure-sof
The board is configured and ready to run the project’s executable code.
The nios2-configure-sof utility runs the Intel® Quartus® Prime Programmer to download the .sof file. You can also run the quartus_pgm command directly.
For more information about programming the hardware, refer to the Nios® II Hardware Development Tutorial.
- Start another command shell displaying both command shells on your desktop.
- In the second command shell, run the Nios® II terminal application to connect to the Intel FPGA development board through the JTAG UART port by typing the nios2-terminal command.
- Return to the original command shell and ensure that <projects>/software_examples/app/hello_world is the current working directory.
-
Download and run the hello_world executable program using the nios2-download -g
hello_world.elf
command.
Hello from Nios II! appears in the second command shell.
4.3.4. Debugging hello_world
This section discusses the process of importing and debugging the hello_world application.
4.3.4.1. Import the hello_world Application
- Launch the Nios II SBT for Eclipse.
- On the File menu, click Import. The Import dialog box appears.
- Expand the Nios II Project folder, and select Import Nios II project.
- Click Next. The File Import wizard appears.
- Click Browse and navigate to the <application> directory, containing the hello_world application project.
- Click OK. The wizard fills in the project path.
- Type the project name hello_world in the Project name box.
-
Click
Finish. The wizard
imports the application project.
Note: If you want to view the BSP source files while debugging, you also need to import the BSP project into the Nios II SBT for Eclipse.
4.3.4.2. Download Executable Code and Start the Debugger
- Right-click the hello_world project, point to Debug As, and click Nios® II Hardware.
-
If the Confirm Perspective Switch dialog box
appears, click Yes.
After a moment, the main() function appears in the editor. There is a blue arrow next to the first line of code, indicating that execution has stopped on this line.
Note: When targeting Nios® II hardware, the Debug As command does the following tasks:- Creates a default debug configuration for the target board
- Establishes communication with the target board
- Downloads the .elf file to memory on the target board
- Sets a breakpoint at main()
- Instructs the Nios® II processor to begin executing the code
-
In the Run menu, click Resume to resume
execution. You can also resume execution by pressing F8.
Note: When debugging a project in Eclipse, you can also pause, stop, and single-step the program, set breakpoints, examine variables, and perform many other common debugging tasks.
4.4. Software Build Tools Scripting Basics
In this section, assume that you want to build a software application for a Nios II system that features the LAN91C111 10/100 Non-PCI Ethernet Single Chip MAC + PHY component and supports the NicheStack® TCP/IP stack. Furthermore, assume that you have organized the hardware design files and the software source files.
4.4.1. Creating a BSP with a Script
A simple method for creating a BSP is to use the nios2-bsp script as in the following example:
nios2-bsp ucosii . ../SOPC/ --cmd enable_sw_package altera_iniche \ --set altera_iniche.iniche_default_if lan91c111 nios2-bsp lwhal . ../user/data/FastNetProject/FastNetHW/ make
Argument | Purpose | Further Information |
---|---|---|
ucosii |
Sets the operating system to MicroC/OS-II |
For more information, refer to “Settings Managed by the Software Build Tools”. |
. | Specifies the directory in which the BSP is to be created | — |
../SOPC/ | Points to the location of the hardware project | — |
--cmd enable_sw_package altera_iniche | Adds the NicheStack TCP/IP stack software package to the BSP |
For more information, refer to “Settings Managed by the Software Build Tools”. For more information, refer to "Software Build Tools Tcl Commands". |
--set altera_iniche.iniche_default_if lan91c111 | Specifies the default hardware interface for the NicheStack TCP/IP Stack - Nios II Edition | For more information, refer to “Settings Managed by the Software Build Tools”. |
The nios2-bsp script uses the .sopcinfo file to create the BSP files. You can override default settings chosen by nios2-bsp by supplying command-line arguments, Tcl scripts, or both.
4.4.2. Creating an Application Project with a Script
To create application projects, use nios2-app-generate-makefile as in the following example:.
nios2-app-generate-makefile --bsp-dir ../BSP \
--elf-name telnet-test.elf
--src-dir source/ make
Argument | Purpose |
---|---|
--bsp-dir ../BSP | Specifies the location of the BSP on which this application is based |
--elf-name telnet-test.elf | Specifies the name of the executable file |
--src-dir source/ | Tells nios2-app-generate-makefile where to find the C source files |
4.5. Running make
You can specify multiple targets on a make command line. For example, the following command removes existing object files in the current project directory, builds the project, downloads the project to a board, and runs it:
make clean download-elf
You can modify an application or user library makefile with the nios2-lib-update-makefile and nios2-app-update-makefile utilities. With these utilities, you can execute the following tasks:
- Add source files to a project
- Remove source files from a project
- Add compiler options to a project’s make rules
- Modify or remove compiler options in a project’s make rules
4.5.1. Creating Memory Initialization Files
make mem_init_generate
This command creates the memory initialization and simulation files for all memory devices. It also generates a Quartus Prime IP File (.qip). The .qip file tells the Quartus Prime software where to find the initialization files. Add the .qip file to your Quartus Prime project.
5. Nios II Software Build Tools
You can invoke the Nios® II SBT through either of the following user interfaces:
- The Eclipse™GUI
- The Nios® II Command Shell
The purpose of this chapter is to make you familiar with the internal functionality of the Nios® II SBT, independent of the user interface employed.
- "Getting Started with the Graphical User Interface"
- "Getting Started from the Command Line"
This chapter assumes you are familiar with the following topics:
- The GNU make
utility. Intel FPGA recommends you use version 3.80 or later. On the Windows platform,
GNU make version
3.80 is provided with the
Nios® II EDS.
You can obtain general information about GNU make from the Free Software Foundation, Inc. website.
- Board support packages.
Depending on how you use the tools, you might also need to be familiar with the following topics:
- Micrium MicroC/OS-II.
For information, refer to MicroC/OS-II - The Real Time Kernel by Jean J. Labrosse (CMP Books).
- Tcl scripting language.
5.1. Road Map for the SBT
5.1.1. What the Build Tools Create
The SBT creates the following types of projects:
- Nios® II application—A program implementing some desired functionality, such as control or signal processing.
- Nios® II BSP—A library providing access to hardware in the Nios® II system, such as UARTs and other I/O devices. A BSP provides a software runtime environment customized for one processor in a hardware system. A BSP optionally also includes the operating system, and other basic system software packages such as communications protocol stacks.
- User library—A library implementing a collection of reusable functions, such as graphics algorithms.
5.1.2. Comparing the Command Line with Eclipse
Feature | Eclipse | Command Line |
---|---|---|
Project source file management | Specify sources automatically, e.g. by dragging and dropping into project | Specify sources manually using command arguments |
Debugging | Yes | Import project to Eclipse environment |
Integrates with custom shell scripts and tool flows | No | Yes |
The Nios® II SBT for Eclipse provides access to a large, useful subset of SBT functionality. Any project you create in Eclipse can also be created using the SBT from the command line or in a script. Create your software project using the interface that is most convenient for you. Later, it is easy to perform additional project tasks in the other interface if you find it advantageous to do so.
5.2. Makefiles
The Nios® II SBT creates two kinds of makefiles:
- Application or user library makefile—A simple makefile that builds the application or user library with user-provided source files
- BSP makefile—A more complex makefile, generated to conform to user-specified settings and the requirements of the target hardware system
It is not necessary to use to the generated application and user library makefiles if you prefer to write your own. However, Intel FPGA recommends that you use the SBT to manage and modify BSP makefiles.
Generated makefiles are platform-independent, calling only utilities provided with the Nios® II EDS (such as nios2-elf-gcc).
The generated makefiles have a straightforward structure, and each makefile has in-depth comments explaining how it works. Intel FPGA recommends that you study these makefiles for further information about how they work. Generated BSP makefiles consist of a single main file and a small number of makefile fragments, all of which reside in the BSP directory. Each application and user library has one makefile, located in the application or user library directory.
5.2.1. Modifying Makefiles
For more information, refer to the Getting Started with the Graphical User Interface section.
Project Type | Utilities |
---|---|
Application | nios2-app-update-makefile |
Library | nios2-lib-update-makefile |
BSP3 |
nios2-bsp-update-settings
nios2-bsp-generate-files |
5.2.2. Makefile Targets
Target | Operation |
---|---|
help | Displays all available application makefile targets. |
all (default) | Builds the associated BSP and libraries, and then builds the application executable file. |
app | Builds only the application executable file. |
bsp | Builds only the BSP. |
libs | Builds only the libraries and the BSP. |
clean | Performs a clean build of the application. Deletes all application-related generated files. Leaves associated BSP and libraries alone. |
clean_all | Performs a clean build of the application, and associated BSP and libraries (if any). |
clean_bsp | Performs a clean build of the BSP. |
clean_libs | Performs a clean build of the libraries and the BSP. |
download-elf | Builds the application executable file and then downloads and runs it. |
program-flash | Runs the Nios® II flash programmer to program your flash memory. |
5.3. Nios II Embedded Software Projects
- C/C++ application projects
- C/C++ user library projects
- BSP projects
This section discusses each type of project in detail.
5.3.1. Applications and Libraries
The private makefile builds one of two types of files:
- A .elf file—For an application
- A library archive file (.a)—For a user library
For a user library, the SBT also generates a public makefile, called public.mk. The public makefile is included in the private makefile for any application (or other user library) that uses the user library.
When you create a makefile for an application or user library, you provide the SBT with a list of source files and a reference to a BSP directory. The BSP directory is mandatory for applications and optional for libraries.
5.3.1.1. Supported Source File Types
Programming Language | File Extensions4 |
---|---|
C | .c |
C++ | .cpp, .cxx, .cc |
Nios® II assembly language; sources are built directly by the Nios® II assembler without preprocessing | .s |
Nios® II assembly language; sources are preprocessed by the Nios® II C preprocessor, allowing you to include header files | .S |
5.3.2. Board Support Packages
A BSP includes a .a file, header files (for example, system.h), and a linker script (linker.x). You use these BSP files when creating an application.
The Nios® II SBT supports two types of BSPs: Intel FPGA Hardware Abstraction Layer (HAL) and Micrium MicroC/OS-II. MicroC/OS-II is a layer on top of the Intel FPGA HAL and shares a common structure.
5.3.2.1. Overview of BSP Creation
By default, the tools generate a basic BSP for a Nios® II system. If you require more detailed control over the characteristics of your BSP, the Nios® II SBT provides that control, as described in the remaining sections of this chapter.
5.3.2.2. Parts of a Nios II BSP
5.3.2.2.1. Hardware Abstraction Layer
The HAL provides a single-threaded UNIX-like C/C++ runtime environment. The HAL provides generic I/O devices, allowing you to write programs that access hardware using the newlib C standard library routines, such as printf(). The HAL interfaces to HAL device drivers, which access peripheral registers directly, abstracting hardware details from the software application. This abstraction minimizes or eliminates the need to access hardware registers directly to connect to and control peripherals.
For more information about the HAL, refer to the "HAL API Reference" section.
5.3.2.2.2. newlib C Standard Library
5.3.2.2.3. Device Drivers
- A device driver is associated with a specific hardware component.
- A device driver might have settings that impact its compilation. These settings become part of the BSP settings.
5.3.2.2.4. Optional Software Packages
In the Nios® II software development environment, a software package typically has the following properties:
- A software package is not associated with specific hardware.
- A software package might have settings that impact its compilation. These settings become part of the BSP settings.
5.3.2.2.5. Optional Real-Time Operating System
The Micrium MicroC/OS-II is a multi-threaded run-time environment. It is built on the Intel FPGA HAL.
The MicroC/OS-II directory structure is a superset of the HAL BSP directory structure. All HAL BSP generated files also exist in the MicroC/OS-II BSP.
The MicroC/OS-II source code resides in the UCOSII directory. The UCOSII directory is contained in the BSP directory, like the HAL directory, and has the same structure (that is, src and inc directories). The UCOSII directory contains only copied files.
The MicroC/OS-II BSP library archive is named libucosii_bsp.a. You use this file the same way you use libhal_bsp.a in a HAL BSP.
5.3.3. Software Build Process
- Obtain the hardware design on which the software is to run. When you are learning about the build tools, this might be a Nios® II design example. When you are developing your own design, it is probably a design developed by someone in your organization. Either way, you need to have the SOPC Information File (.sopcinfo).
-
Decide what features the BSP requires.
For example, does it need to support an RTOS? Does it need other specialized
software support, such as a TCP/IP stack? Does it need to fit in a small memory
footprint? The answers to these questions tell you what BSP features and
settings to use.
For more information about available BSP settings, refer to the " Nios® II Software Build Tools Reference" chapter.
-
Define a BSP. Use the
Nios® II SBT to
specify the components in the BSP, and the values of any relevant settings. The
result of this step is a BSP settings file, called settings.bsp.
For more information about creating BSPs, refer to the "Board Support Packages" chapter.
- Create a BSP makefile using the Nios II build tools.
-
Optionally create a user library. If
you need to include a custom software user library, you collect the user library
source files in a single directory, and create a user library makefile. The Nios
II build tools can create a makefile for you. You can also create a makefile by
hand, or you can autogenerate a makefile and then customize it by hand.
For more information about creating user library projects, refer to the “Applications and Libraries” chapter.
-
Collect your application source code.
When you are learning, this might be a
Nios® II software example. When you are
developing a product, it is probably a collection of C/C++ source files
developed by someone in your organization.
For more information about creating application projects, refer to the “Applications and Libraries” chapter.
-
Create an application makefile. The
easiest approach is to let the
Nios® II build tools create the makefile for you.
You can also create a makefile by hand, or you can autogenerate a makefile and
then customize it by hand.
For more information about creating makefiles, refer to the “Makefiles” chapter.
Note: You must use the correct directory path for fetching the respective files from your project folder.
5.4. Common BSP Tasks
Although this section describes tasks in terms of the SBT command line flow, you can also carry out most of these tasks with the Nios® II SBT for Eclipse.
5.4.1. Adding the Nios II SBT to Your Tool Flow
5.4.1.1. Using Version Control
When you are using version control, it is important to know which files to add to your version control database. With the Nios® II SBT, the version control requirements depend on what you are trying to do and how you create the BSP.
5.4.1.1.1. Creating BSP by Running a User Defined Script to Call nios2-bsp
For more information, refer to “Revising Your BSP” on page 4–28 for a discussion of BSP regeneration with Nios® II EDS updates.
5.4.1.1.2. Creating BSP by Manually Running nios2-bsp
5.4.1.1.3. Creating BSP before Running Make
5.4.1.1.4. Creating a Script that Uses the Command-Line Tools
5.4.1.2. Copying, Moving, or Renaming a BSP
Run make clean when you copy, move, or rename a BSP. The make dependency files (.d) have absolute path references. make clean removes the .d files, as well as linker object files (.o) and .a files. You must rebuild the BSP before linking an application with it. You can use the make clean_bsp command to combine these two operations.
For more information about .d files, refer to the GNU make documentation, available from the Free Software Foundation, Inc. website.
Another way to copy a BSP is to run the nios2-bsp-generate-files command to populate a BSP directory and pass it the path to the BSP settings file of the BSP that you wish to copy.
If you rename or move a BSP, you must manually revise any references to the BSP name or location in application or user library makefiles.
5.4.1.3. Handing Off a BSP
5.4.2. Linking and Locating
For more information, refer to “Specifying the Default Memory Map” on page 4–35.
However, in some cases these assumptions might not work for you. For example, you might implement a custom boot configuration that requires a bootloader in a specific location; or you might want to specify which memory device contains your interrupt service routines (ISRs).
This section describes several common scenarios in which the SBT allows you to control details of memory usage.
5.4.2.1. Creating Memory Initialization Files
The mem_init.mk file includes targets designed to help you create memory initialization files (.dat, .hex, .sym, and .flash). The mem_init.mk file is designed to be included in your application makefile. Memory initialization files are used for HDL simulation, for Quartus Prime compilation of initializable FPGA on-chip memories, and for flash programming. Memories that can be initialized include M512 and M4K, but not MRAM.
Although the application makefile provides the mem_init.mk targets, it does not build any of them by default. The SBT creates the memory initialization files in the application directory (under a directory named mem_init). The SBT optionally copies them to your Quartus Prime project directory and HDL simulation directory.
QUARTUS_PROJECT_DIR = ../my_hw_design MEM_INIT_FILE := $(BSP_ROOT_DIR)/mem_init.mk include $(MEM_INIT_FILE)
Target | Operation |
---|---|
mem_init_install |
Generates memory initialization files in the application mem_init directory. If the QUARTUS_PROJECT_DIR variable is defined, mem_init.mk copies memory initialization files to your Intel® Quartus® Prime project directory named $(QUARTUS_PROJECT_DIR). |
mem_init_generate | Generates all
memory initialization files in the application mem_init directory. This target also generates a Quartus Prime IP File (.qip). The .qip file tells the Quartus Prime software where to find the initialization files. |
mem_init_clean | Removes the memory initialization files from the application mem_init directory. |
.hex | Generates all .hex files. |
.dat | Generates all .dat files. |
.sym | Generates all .sym files. |
.flash | Generates all .flash files. |
<memory name> | Generates all memory initialization files for <memory name> component. |
5.4.2.2. Modifying Linker Memory Regions
Suppose you have a memory region named onchip_ram. The Tcl script named reserve_1024_onchip_ram.tcl separates the top 1024 bytes of onchip_ram to create a new region named onchip_special.
For more information about an explanation of each Tcl command used in this example, refer to the " Nios® II Software Build Tools Reference" chapter.
# Get region information for onchip_ram memory region. # Returned as a list. set region_info [get_memory_region onchip_ram] # Extract fields from region information list. set region_name [lindex $region_info 0] set slave_desc [lindex $region_info 1] set offset [lindex $region_info 2] set span [lindex $region_info 3] # Remove the existing memory region. delete_memory_region $region_name # Compute memory ranges for replacement regions. set split_span 1024 set new_span [expr $span-$split_span] set split_offset [expr $offset+$new_span] # Create two memory regions out of the original region. add_memory_region onchip_ram $slave_desc $offset $new_span add_memory_region onchip_special $slave_desc $split_offset $split_span
If you pass this Tcl script to nios2-bsp, it runs after the default Tcl script runs and sets up a linker region named onchip_ram0. You pass the Tcl script to nios2-bsp as follows:
nios2-bsp hal my_bsp --script reserve_1024_onchip_ram.tcl
If you run nios2-bsp again to update your BSP without providing the --script option, your BSP reverts to the default linker memory regions and your onchip_special memory region disappears. To preserve it, you can either provide the --script option to your Tcl script or pass the DONT_CHANGE keyword to the default Tcl script as follows:
nios2-bsp hal my_bsp --default_memory_regions DONT_CHANGE
Intel FPGA recommends that you use the --script approach when updating your BSP. This approach allows the default Tcl script to update memory regions if memories are added, removed, renamed, or resized. Using the DONT_CHANGE keyword approach does not handle any of these cases because the default Tcl script does not update the memory regions at all.
For more information about using the --script argument, refer to the “Calling a Custom BSP Tcl Script” section.
5.4.2.3. Creating a Custom Linker Section
- .entry
- .exceptions
- .text
- .rodata
- .rwdata
- .bss
- .heap
- .stack
5.4.2.3.1. Creating a Linker Section for an Existing Region
nios2-bsp hal my_bsp --cmd add_section_mapping special_section onchip_special
When the nios2-bsp-generate-files utility (called by nios2-bsp) generates the linker script linker.x, the linker script has a new section mapping. The order of section mappings in the linker script is determined by the order in which the add_section_mapping command creates the sections. If you use nios2-bsp, the default Tcl script runs before the --cmd option that creates the special_section section.
If you run nios2-bsp again to update your BSP, you do not need to provide the add_section_mapping command again because the default Tcl script only modifies section mappings for the default sections listed in the Nios® II Default Section Names table.
5.4.2.3.2. Dividing a Linker Region to Create a New Region and Section
Example 4–2. To Create a Section named .isrs in the tightly_coupled_instruction_memory on-chip memory
# Get region information for tightly_coupled_instruction_memory memory region. # Returned as a list. set region_info [get_memory_region tightly_coupled_instruction_memory] # Extract fields from region information list. set region_name [lindex $region_info 0] set slave [lindex $region_info 1] set offset [lindex $region_info 2] set span [lindex $region_info 3] # Remove the existing memory region. delete_memory_region $region_name # Compute memory ranges for replacement regions. set split_span 1024 set new_span [expr $span-$split_span] set split_offset [expr $offset+$new_span] # Create two memory regions out of the original region. add_memory_region tightly_coupled_instruction_memory $slave $offset $new_span add_memory_region isrs_region $slave $split_offset $split_span add_section_mapping .isrs isrs_region
The above Tcl script splits off 1 KB of RAM from the region named tightly_coupled_instruction_memory, gives it the name isrs_region, and then calls add_section_mapping to add the .isrs section to isrs_region.
Using the Create a New Region and Section Tcl Script
To use such a Tcl script, you would execute the following steps:
- Create the Tcl script as shown in the example, above.
-
Edit your
create-this-bsp
script, and add the following argument to the
nios2-bsp command
line:
--script <script name>.tcl
- In the BSP project, edit timer_interrupt_latency.h. In the timer_interrupt_latency_irq() function, change the .section directive from .exceptions to .isrs.
- Rebuild the application by running make.
5.4.2.3.3. Excerpts from Object Dump Files
Sections: Idx Name Size VMA LMA File off Algn . . . 6 .isrs 000000c0 04000c00 04000c00 000000b4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE . . . 9 .tightly_coupled_instruction_memory 00000000 04000000 04000000 00013778 2**0 CONTENTS . . . SYMBOL TABLE: 00000000 l d .entry 00000000 30000020 l d .exceptions 00000000 30000150 l d .text 00000000 30010e14 l d .rodata 00000000 30011788 l d .rwdata 00000000 30013624 l d .bss 00000000 04000c00 l d .isrs 00000000 00000020 l d .ext_flash 00000000 03200000 l d .epcs_controller 00000000 04000000 l d .tightly_coupled_instruction_memory 00000000 04004000 l d .tightly_coupled_data_memory 00000000 . . .
5.4.2.3.4. Excerpt from Linker.x
MEMORY { reset : ORIGIN = 0x0, LENGTH = 32 tightly_coupled_instruction_memory : ORIGIN = 0x4000000, LENGTH = 3072 isrs_region : ORIGIN = 0x4000c00, LENGTH = 1024 . . . }
5.4.2.4. Changing the Default Linker Memory Region
For more information about all default memory sections mapped to this default region, refer to the previous chapter, "Creating a Custom Linker Section".
You can pass in a command-line option to the default Tcl script to override this default mapping. To map all default sections to onchip_ram, type the following command:
nios2-bsp hal my_bsp --default_sections_mapping onchip_ram
If you run nios2-bsp again to update your BSP, the default Tcl script overrides your default sections mapping. To prevent your default sections mapping from being changed, provide nios2-bsp with the original --default_sections_mapping command-line option or pass it the DONT_CHANGE value for the memory name instead of onchip_ram.
5.4.2.5. Changing a Linker Section Mapping
nios2-bsp hal my_bsp --cmd add_section_mapping .stack ram0 \ --cmd add_section_mapping .heap ram0
The other section mappings (for example, .text) are still mapped to the default linker memory region.
If you run nios2-bsp again to update your BSP, the default Tcl script overrides your section mappings for .stack and .heap because they are default sections. To prevent your section mappings from being changed, provide nios2-bsp with the original add_section_mapping command-line options or pass the --default_sections_mapping DONT_CHANGE command line to nios2-bsp.
Intel FPGA recommends using the --cmd add_section_mapping approach when updating your BSP because it allows the default Tcl script to update the default sections mapping if memories are added, removed, renamed, or resized.
5.4.3. Other BSP Tasks
5.4.3.1. Creating a BSP for an Altera Development Board
-
Start the
Nios® II Command Shell.
For details about the Nios® II Command Shell, refer to the "Getting Started from the Command Line" chapter.
- Create a working directory for your hardware and software projects. The following steps refer to this directory as <projects>.
- Make <projects> the current working directory.
- Find a Nios® II hardware example corresponding to your Intel FPGA development board. For example, if you have a Stratix® IV development board, you might select < Nios® II EDS install path>/examples/verilog/niosII_stratixIV_4sgx230/triple_speed_ethernet_design.
-
Copy the hardware example to your
working directory, using a command such as the following:
cp -R /altera/100/nios2eds/examples/verilog\ /niosII_stratixIV_4sgx230/triple_speed_ethernet_design
-
Ensure that the working directory and
all subdirectories are writable by typing the following command:
chmod -R +w
The <projects> directory contains a subdirectory named software_examples/bsp. The bsp directory contains several BSP example directories, such as hal_default. Select the directory containing an appropriate BSP, and make it the current working directory.
For a description of the example BSPs, refer to “ Nios® II Design Example Scripts” in the Nios® II Software Build Tools Reference section.
-
Create and build the BSP with the
create-this-bsp
script by typing the following command:
./create-this-bsp
Now you have a BSP, with which you can create and build an application.
Note: Intel FPGA recommends that you examine the contents of the create-this-bsp script. It is a helpful example if you are creating your own script to build a BSP. create-this-bsp calls nios2-bsp with a few command-line options to create a customized BSP, and then calls make to build the BSP.
5.4.3.2. Querying Settings
If you want to know the value of one or more settings, run nios2-bsp-query-settings with the appropriate command-line options. This command sends the values of the settings you requested to stdout. Just capture the output of stdout in some variable in your script when you call nios2-bsp-query-settings. By default, the output of nios2-bsp-query-settings is an ordered list of all option values. Use the -show-names option to display the name of the setting with its value.
For more information about the nios2-bsp-query-settings command-line options, refer to the Nios® II Software Build Tools Reference section.
5.4.3.3. Managing Device Drivers
The SBT includes BSP Tcl commands to manage device drivers. With these commands you can control which driver is used for each device. When the alt_sys_init.c file is generated, it is set up to initialize drivers as you have requested.
If you are using nios2-bsp, you disable the driver for the uart0 device as follows:
nios2-bsp hal my_bsp --cmd set_driver none uart0
Use the --cmd option to call a Tcl command on the command line. The nios2-bsp-create-settings command also supports the --cmd option. Alternatively, you can put the set_driver command in a Tcl script and pass the script to nios2-bsp or nios2-bsp-create-settings with the --script option.
You replace the default driver for uart0 with a specific version of a driver as follows:
nios2-bsp hal my_bsp --cmd set_driver altera_avalon_uart:6.1 uart0
5.4.3.4. Creating a Custom Version of newlib
To create a custom compiled version of newlib, set a BSP setting to the desired compiler flags. If you are using nios2-bsp, type the following command:
nios2-bsp hal my_bsp --set hal.custom_newlib_flags "-O0 -pg"
Because newlib uses the open source configure utility, its build flow differs from other files in the BSP. When Makefile builds the BSP, it runs the configure utility. The configure utility creates a makefile in the build directory, which compiles the newlib source. The newlib library files are copied to the BSP directory named newlib. The newlib source files are not copied to the BSP.
nios2-elf-gcc --print-multi-lib
For more information about Nios® II specific flags, refer to the " Nios® II Options" section in the GCC online documentation.
5.4.3.5. Controlling the stdio Device
- To prevent a default stdio device from being chosen, use the
following command:
nios2-bsp hal my_bsp --default_stdio none
- To override the default stdio device and replace it
with uart1, use the
following command:
nios2-bsp hal my_bsp --default_stdio uart1
- To override the stderr device and replace it with uart2, while allowing the
default Tcl script to choose the default stdout and stdin devices, use the following command:
nios2-bsp hal my_bsp --set hal.stderr uart2
In all these cases, if you run nios2-bsp again to update your BSP, you must provide the original command-line options again to prevent the default Tcl script from choosing its own default stdio devices. Alternatively, you can call --default_stdio with the DONT_CHANGE keyword to prevent the default Tcl script from changing the stdio device settings.
5.4.3.6. Configuring Optimization and Debugger Options
You can control the optimization and debug level through the project makefile, which determines the compiler options.
Example 4–5. Default Application Makefile Settings
APP_CFLAGS_OPTIMIZATION := -O0 APP_CFLAGS_DEBUG_LEVEL := -g
When your project is fully debugged and ready for release, you might want to enable optimization and omit the symbol table, to achieve faster, smaller executable code. To enable optimization and turn off the symbol table, edit the application makefile to contain the symbol definitions shown in the following example. The absence of a value on the right hand side of the APP_CFLAGS_DEBUG_LEVEL definition causes the compiler to omit generating a symbol table.
Example 4–6. Application Makefile Settings with Optimization
APP_CFLAGS_OPTIMIZATION := -O3 APP_CFLAGS_DEBUG_LEVEL :=
For more information about makefile editing and make clean, refer to the “Applications and Libraries” chapter.
5.4.3.6.1. Configuring a BSP for Debugging
nios2-bsp hal my_bsp --set hal.make.bsp_cflags_debug -g \ --set hal.make.bsp_cflags_optimization -O0r
Alternatively, you can manipulate the BSP settings with a Tcl script.
You can easily copy an existing BSP and modify it to create a different build configuration.
For more information, refer to the “Copying, Moving, or Renaming a BSP” chapter.
To change the optimization and debug level for a user library, use the same procedure as for an application.
5.5. Details of BSP Creation
For more information about BSP settings files, refer to the “BSP Settings File Creation” chapter.
nios2-bsp-generate-files creates the BSP files. The nios2-bsp-generate-files utility places all source files in your BSP directory. It copies some files from the Nios® II EDS installation directory. Others, such as system.h and Makefile, it generates dynamically.
The SBT manages copied files slightly differently from generated files. If a copied file (such as a HAL source file) already exists, the tools check the file timestamp against the timestamp of the file in the Nios® II EDS installation. The tools do not replace the BSP file unless it differs from the distribution file. The tools normally overwrite generated files, such as the BSP Makefile, system.h, and linker.x, unless you have disabled generation of the individual file with the set_ignore_file Tcl command or the Enable File Generation tab in the BSP Editor. A comment at the top of each generated file warns you not to edit it.
For more information about set_ignore_file and other SBT Tcl commands, refer to Software Build Tools Tcl Commands in the " Nios® II Software Build Tools Reference" chapter.
For more information about regenerating your BSP, refer to the “Revising Your BSP” chapter.
5.5.1. BSP Settings File Creation
The BSP settings file does not need to duplicate system information (such as base addresses of devices), because the nios2-bsp-generate-files utility has access to the .sopcinfo file.
The nios2-bsp-create-settings utility creates a new BSP settings file. The nios2-bsp-update-settings utility updates an existing BSP settings file. The nios2-bsp-query-settings utility reports the setting values in an existing BSP settings file. The nios2-bsp-generate-files utility generates a BSP from the BSP settings file.
5.5.2. Generated and Copied Files
A copied file is installed with the Nios® II EDS, and copied to your BSP directory when you create your BSP. It does not replace the BSP file unless it differs from the distribution file.
A generated file is dynamically created by the nios2-bsp-generate-files utility. Generated files reside in the top-level BSP directory. BSP files are normally written every time nios2-bsp-generate-files runs.
You can disable generation of any BSP file in the BSP Editor, or on the command line with the set_ignore_file Tcl command. Otherwise, if you modify a BSP file, it is destroyed when you regenerate the BSP.
5.5.3. HAL BSP Files and Folders
5.5.3.1. HAL BSP After Generating Files
File Name | Function |
---|---|
settings.bsp | Contains all BSP settings.
This file is coded in XML. On the command line, settings.bsp is created by the nios2-bsp-create-settings command, and optionally updated by the nios2-bsp-update-settings command. The nios2-bsp-query-settings command is available to parse information from the settings file for your scripts. The settings.bsp file is an input to nios2-bsp-generate-files. The Nios® II SBT for Eclipse provides equivalent functionality. |
summary.html | Provides summary documentation of the BSP. You can view summary.html with a hypertext viewer or browser, such as Internet Explorer or Firefox. If you change the settings.bsp file, the SBT updates the summary.html file the next time you regenerate the BSP. |
Makefile | Used to build the BSP. The targets you use most often are all and clean. The all target (the default) builds the libhal_bsp.a library file. The clean target removes all files created by a make of the all target. |
public.mk | A makefile fragment that provides public information about the BSP. The file is designed to be included in other makefiles that use the BSP, such as application makefiles. The BSP Makefile also includes public.mk. |
mem_init.mk | A makefile fragment that
defines targets and rules to convert an application executable file
to memory initialization files (.dat, .hex, and
.flash) for HDL simulation, flash programming, and
initializable FPGA memories. The mem_init.mk file is
designed to be included by an application makefile. For usage, refer
to any application makefile generated when you run the SBT. For more information, refer to the “Creating Memory Initialization Files” chapter. |
alt_sys_init.c | Used to initialize device driver instances and software packages. |
system.h | Contains the C declarations describing the BSP memory map and other system information needed by software applications. |
linker.h | Contains information about the linker memory layout. system.h includes the linker.h file. |
linker.x | Contains a linker script for the GNU linker. |
memory.gdb | Contains memory region declarations for the GNU debugger. |
obj Directory | Contains the object code files for all source files in the BSP. The hierarchy of the BSP source files is preserved in the obj directory. |
libhal_bsp.a Library | Contains the HAL BSP
library. All object files are combined in the library file. The HAL BSP library file is always named libhal_bsp.a. |
5.5.3.2. Copied BSP Files
File Name | Function |
---|---|
HAL Directory | Contains HAL source code files. These are all copied files. The src directory contains the C-language and assembly-language source files. The inc directory contains the header files. The crt0.S source file, containing HAL C run-time startup code, resides in the HAL/src directory. |
drivers Directory | Contains all driver source code. The files in this directory are all copied files. The drivers directory has src and inc subdirectories like the HAL directory. |
5.5.3.3. HAL BSP After Build
HAL BSP After Build
5.5.4. Linker Map Validation
- The .entry section maps to a nonexistent region.
- The .entry section maps to a memory region that is less than 32 bytes in length.
- The .entry section maps to a memory region that does not start on the reset vector base address.
- The .exceptions section maps to a nonexistent region.
- The .exceptions section maps to a memory region that does not start on the exception vector base address.
- The .entry section and .exceptions section map to the same device, and the memory region associated with the .exceptions section precedes the memory region associated with the .entry section.
- The .entry section and .exceptions section map to the same device, and the base address of the memory region associated with the .exceptions section is less than 32 bytes above the base address of the memory region associated with the .entry section.
5.6. Tcl Scripts for BSP Settings
You control the characteristics of your BSP by manipulating BSP settings, using Tcl commands. The most powerful way of using Tcl commands is by combining them in Tcl scripts.
Tcl scripting gives you maximum control over the contents of your BSP. One advantage of Tcl scripts over command-line arguments is that a Tcl script can obtain information from the hardware system or pre-existing BSP settings, and then use it later in script execution.
For more information about the Tcl commands used to manipulate BSPs, refer to “Software Build Tools Tcl Commands” in the Nios® II Software Build Tools Reference section.
5.6.1. Calling a Custom BSP Tcl Script
nios2-bsp --script custom_bsp.tcl
nios2-bsp-create-settings --script custom_bsp.tcl
nios2-bsp-query-settings --script custom_bsp.tcl
nios2-bsp-update-settings --script custom_bsp.tcl
In the Nios® II BSP editor, you can execute a Tcl script when generating a BSP, through the New BSP Settings File dialog box.
For more information about using Tcl scripts in the SBT for Eclipse, refer to Using the BSP Editor in the "Getting Started with the Graphical User Interface" chapter.
For more information, refer to an example of custom Tcl script usage in the “Creating Memory Initialization Files” chapter.
For more information about BSP defaults, refer to the “Specifying BSP Defaults” chapter.
For more information, refer to the “Using Version Control” chapter.
5.6.1.1. Simple Tcl Script
set default_stdio my_uart set_setting hal.stdin $default_stdio set_setting hal.stdout $default_stdio set_setting hal.stderr $default_stdio
5.6.1.2. Tcl Script to Examine Hardware and Choose Settings
If a component has only one slave port connected to the Nios® II processor, the slave descriptor is the same as the name of the component (for example, onchip_mem_0). If a component has multiple slave ports connecting the Nios® II to multiple resources in the component, the slave descriptor is the name of the component followed by an underscore and the slave port name (for example, onchip_mem_0_s1).
# Select a device connected to the processor as the default STDIO device. # It returns the slave descriptor of the selected device. # It gives first preference to devices with stdio in the name. # It gives second preference to JTAG UARTs. # If no JTAG UARTs are found, it uses the last character device. # If no character devices are found, it returns "none". # Procedure that does all the work of determining the stdio device proc choose_default_stdio {} { set last_stdio "none" set first_jtag_uart "none" # Get all slaves attached to the processor. set slave_descs [get_slave_descs] foreach slave_desc $slave_descs { # Lookup module class name for slave descriptor. set module_name [get_module_name $slave_desc] set module_class_name [get_module_class_name $module_name] # If the module_name contains "stdio", we choose it # and return immediately. if { [regexp .*stdio.* $module_name] } { return $slave_desc } # Assume it is a JTAG UART if the module class name contains # the string "jtag_uart". In that case, return the first one # found. if { [regexp .*jtag_uart.* $module_class_name] } { if {$first_jtag_uart == "none"} { set first_jtag_uart $slave_desc } } # Track last character device in case no JTAG UARTs found. if { [is_char_device $slave_desc] } { set last_stdio $slave_desc } } if {$first_jtag_uart != "none"} { return $first_jtag_uart } return $last_stdio } # Call routine to determine stdio set default_stdio [choose_default_stdio] # Set stdio settings to use results of above call. set_setting hal.stdin $default_stdio set_setting hal.stdout $default_stdio set_setting hal.stderr $default_stdio # Select a device connected to the processor as the default STDIO device. # It returns the slave descriptor of the selected device. # It gives first preference to devices with stdio in the name. # It gives second preference to JTAG UARTs. # If no JTAG UARTs are found, it uses the last character device. # If no character devices are found, it returns "none". # Procedure that does all the work of determining the stdio device proc choose_default_stdio {} { set last_stdio "none" set first_jtag_uart "none" # Get all slaves attached to the processor. set slave_descs [get_slave_descs] foreach slave_desc $slave_descs { # Lookup module class name for slave descriptor. set module_name [get_module_name $slave_desc] set module_class_name [get_module_class_name $module_name] # If the module_name contains "stdio", we choose it # and return immediately. if { [regexp .*stdio.* $module_name] } { return $slave_desc } # Assume it is a JTAG UART if the module class name contains # the string "jtag_uart". In that case, return the first one # found. if { [regexp .*jtag_uart.* $module_class_name] } { if {$first_jtag_uart == "none" } { set first_jtag_uart $slave_desc } } # Track last character device in case no JTAG UARTs found. if { [is_char_device $slave_desc] } { set last_stdio $slave_desc } } if {$first_jtag_uart != "none"} { return $first_jtag_uart } return $last_stdio } # Call routine to determine stdio set default_stdio [choose_default_stdio] # Set stdio settings to use results of above call. set_setting hal.stdin $default_stdio set_setting hal.stdout $default_stdio set_setting hal.stderr $default_stdio
5.7. Revising Your BSP
Every BSP is based on a Nios® II processor in a hardware system. The BSP settings file does not duplicate information available in the .sopcinfo file, but it does contain system-dependent settings that reference system information. Because of these system-dependent settings, a BSP settings file can become inconsistent with its system if the system changes.
You can revise a BSP at several levels. This section describes each level, and provides guidance about when to use it.
5.7.1. Rebuilding Your BSP
5.7.1.1. What Happens
5.7.1.2. How to Rebuild Your BSP
On the command line, change to the BSP directory and type make.
5.7.2. Regenerating Your BSP
5.7.2.1. What Happens
- Reads the .sopcinfo file for basic system parameters such as module base addresses and clock frequencies.
- Retrieves the current system identification (ID) from the .sopcinfo file. Ensures that the correct system ID is inserted in the .elf file the next time the BSP is built.
- Adjusts the default memory map to correspond to changes in memory sizes. If you are using a custom memory map, it is untouched.
- Retains all other existing settings in the BSP settings file.
- Ensures that the correct set of BSP files is present, as follows:
- Copies all required source files
to the BSP directory tree. Copied BSP files are listed in the "Copied BSP
Files" (Table 4–8 on
page 4–23).
If a copied file (such as a HAL source file) already exists, the SBT checks the file timestamp against the timestamp of the file in the Nios® II EDS installation. The tools do not replace the BSP file unless it differs from the distribution file.
- Recreates all generated files. Generated BSP files are listed in the "Generated BSP Files" table (Table 4–7 on page 4–23).
- Copies all required source files
to the BSP directory tree. Copied BSP files are listed in the "Copied BSP
Files" (Table 4–8 on
page 4–23).
- Removes any files that are not required, for example, source files for drivers that are no longer in use.
5.7.2.2. When to Regenerate Your BSP
- You change your hardware design, but all BSP
system-dependent settings remain consistent with the new .sopcinfo file. The
following are examples of system changes that do not affect BSP system-dependent
settings:
- Changing a component’s base address
- With the internal interrupt controller (IIC), adding or removing hardware interrupts
- With the IIC, changing a hardware interrupt number
- Changing a clock frequency
- Changing a simple processor option, such as cache size or core type
- Changing a simple component option, other than memory size.
- Adding a bridge
- Adding a new component
- Removing or renaming a component, other than a memory component, the stdio device, or the system timer device
- Changing the size of a memory component when you are using the default memory map
Note: Unless you are sure that your modified hardware design remains consistent with your BSP settings, update your BSP. For more information, refer to the “Updating Your BSP” chapter. - You want to eliminate any customized source files and revert to the distributed
BSP code.Note: To revert to the distributed BSP code, you must ensure that you have not disabled generation on any BSP files.
- You have installed a new version of the Nios® II EDS, and you want the updated BSP software implementations.
- When you attempt to rebuild your project, an error message indicates that the BSP must be updated.
- You have updated or recreated the BSP settings file.
5.7.2.3. How to Regenerate Your BSP
5.7.2.3.1. Regenerating Your BSP in Eclipse
For more information about generating a BSP with the SBT for Eclipse, refer to the Getting Started with the Graphical User Interface section.
5.7.2.3.2. Regenerating Your BSP from the Command Line
For more information about the nios2-bsp-generate-files command, refer to the Nios® II Software Build Tools Reference section.
5.7.3. Updating Your BSP
5.7.3.1. What Happens
- System-dependent settings are derived from the original BSP settings file, but adjusted to correspond with any changes in the hardware system.
- Non-system-dependent BSP settings persist from the original BSP settings file.
For more information about actions taken when you regenerate the BSP after updating it, refer to the “Regenerating Your BSP” chapter.
5.7.3.2. When to Update Your BSP
- A change to your BSP settings is required.
- Changes to your .sopcinfo file make it inconsistent with your BSP. The following are examples of system changes that affect BSP system-dependent settings:
- Renaming the processor
- Renaming or removing a memory, the stdio device, or the system timer device
- Changing the size of a memory component when using a custom memory map
- Changing the processor reset or exception slave port or offset
- Adding or removing an external interrupt controller (EIC)
- Changing the parameters of an EIC
- When you attempt to rebuild your project, an error message indicates that you must update the BSP.
5.7.3.3. How to Update Your BSP
From the command line, use the nios2-bsp-update-settings command. You can use the --script option to define the BSP with a Tcl script.
For more information about the nios2-bsp-update-settings command, refer to the " Nios® II Software Build Tools Reference" chapter.
nios2-bsp-update-settings does not reapply default settings unless you explicitly call the top-level default Tcl script with the --script option.
For more information about using the default Tcl script, refer to the “Specifying BSP Defaults” chapter.
Alternatively, you can update your BSP with the nios2-bsp script. nios2-bsp determines that your BSP already exists, and uses the nios2-bsp-update-settings command to update the BSP settings file.
The nios2-bsp script executes the default Tcl script every time it runs, overwriting previous default settings.
For more information about preserving all settings, including the default settings, use the DONT_CHANGE keyword, described in the “Top Level Tcl Script for BSP Defaults” chapter.
Alternatively, you can provide nios2-bsp with command-line options or Tcl scripts to override the default settings.
For more information about using the nios2-bsp script, refer to the " Nios® II Software Build Tools Reference" chapter.
5.7.4. Recreating Your BSP
5.7.4.1. What Happens
- System-dependent settings are created based on the current hardware system.
- Non-system-dependent settings can be selected by the default Tcl script, by
values you specify, or both.
For more information about actions taken when you generate the BSP after recreating it, refer to the “Regenerating Your BSP” chapter.
5.7.4.2. When to Recreate Your BSP
5.7.4.3. How to Recreate Your BSP
5.7.4.3.1. Using Tcl Scripts When Recreating Your BSP
To use Tcl scripts most effectively, it is best to create a Tcl script at the time you initially create the BSP. However, the BSP Editor enables you to export a Tcl script from an existing BSP.
For more information about exporting Tcl scripts, refer to Using the BSP Editor in the "Getting Started with the Graphical User Interface" chapter.
By recreating the BSP settings file with a Tcl script that specifies all BSP settings, you can reproduce the original BSP while ensuring that system-dependent settings are adjusted correctly based on any changes in the hardware system.
For more information about Tcl scripting with the SBT, refer to the “Tcl Scripts for BSP Settings”.
5.7.4.3.2. Recreating Your BSP in Eclipse
For more information, refer to “Getting Started with Nios® II Software in Eclipse” and “Using the BSP Editor” in the Getting Started with the Graphical User Interface section.
5.7.4.3.3. Recreating Your BSP at the Command Line
The nios2-bsp-create-settings command does not apply default settings to your BSP. However, you can use the --script command-line option to run the default Tcl script.
For more information about the default Tcl script, refer to the “Specifying BSP Defaults” chapter.
For more information about using the nios2-bsp-create-settings command, refer to the " Nios® II Software Build Tools Reference" chapter.
5.8. Specifying BSP Defaults
< Nios® II EDS install path>/sdk2/bin
Script | Level | Summary |
---|---|---|
bsp-set-defaults.tcl | Top-level | Sets system-dependent settings to default values. |
bsp-call-proc.tcl | Top-level | Calls a specified procedure in one of the helper scripts. |
bsp-stdio-utils.tcl | Helper | Specifies stdio device settings. |
bsp-timer-utils.tcl | Helper | Specifies system timer device setting. |
bsp-linker-utils.tcl | Helper | Specifies memory regions and section mappings for linker script. |
bsp-bootloader-utils.tcl | Helper | Specifies boot loader-related settings. |
For more information about Tcl scripting with the SBT, refer to the “Tcl Scripts for BSP Settings” chapter.
The Nios® II SBT uses the default Tcl scripts to specify default values for system-dependent settings. System-dependent settings are BSP settings that reference system information in the .sopcinfo file.
The SBT executes the default Tcl script before any user-specified Tcl scripts. As a result, user input overrides settings made by the default Tcl script.
You can pass command-line options to the default Tcl script to override the choices it makes or to prevent it from making changes to settings.
For more information, refer to the “Top Level Tcl Script for BSP Defaults” chapter.
The default Tcl script makes the following choices for you based on your hardware system:
- stdio character device
- System timer device
- Default linker memory regions
- Default linker sections mapping
- Default boot loader settings
The default Tcl scripts use slave descriptors to assign devices.
5.8.1. Top Level Tcl Script for BSP Defaults
The default Tcl script consists of a top-level Tcl script named bsp-set-defaults.tcl plus the helper Tcl scripts listed in the "Default Tcl Script Components" table (Table 4–9). The helper Tcl scripts do the real work of examining the .sopcinfo file and choosing appropriate defaults.
The bsp-set-defaults.tcl script sets the following defaults:
- stdio character device (bsp-stdio-utils.tcl)
- System timer device (bsp-timer-utils.tcl)
- Default linker memory regions (bsp-linker-utils.tcl)
- Default linker sections mapping (bsp-linker-utils.tcl)
- Default boot loader settings (bsp-bootloader-utils.tcl)
You run the default Tcl script on the nios2-bsp-create-settings, nios2-bsp-query-settings, or nios2-bsp-update-settings command line, by using the --script argument. It has the following usage:
bsp-set-defaults.tcl [<argument name> <argument value>]*
All arguments are optional. If present, each argument must be in the form of a name and argument value, separated by white space. All argument values are strings. For any argument not specified, the corresponding helper script chooses a suitable default value. In every case, if the argument value is DONT_CHANGE, the default Tcl scripts leave the setting unchanged. The DONT_CHANGE value allows fine-grained control of what settings the default Tcl script changes and is useful when updating an existing BSP.
Argument Name | Argument Value |
---|---|
default_stdio | Slave descriptor of default stdio device (stdin, stdout, stderr). Set to none if no stdio device desired. |
default_sys_timer | Slave descriptor of default system timer device. Set to none if no system timer device desired. |
default_memory_regions | Controls generation of memory regions By default, bsp-linker-utils.tcl removes and regenerates all current memory regions. Use the DONT_CHANGE keyword to suppress this behavior. |
default_sections_mapping | Slave descriptor of the memory device to which the default sections are mapped. This argument has no effect if default_memory_regions == DONT_CHANGE. |
enable_bootloader | Boolean: 1 if a boot loader is present; 0 otherwise. |
5.8.2. Specifying the Default stdio Device
For more information about these settings, refer to the Nios® II Software Build Tools Reference section.
The script searches the .sopcinfo file for a slave descriptor with the string stdio in its name. If bsp-stdio-utils.tcl finds any such slave descriptors, it chooses the first as the default stdio device. If the script finds no such slave descriptor, it looks for a slave descriptor with the string jtag_uart in its component class name. If it finds any such slave descriptors, it chooses the first as the default stdio device. If the script finds no slave descriptors fitting either description, it chooses the last character device slave descriptor connected to the Nios® II processor. If bsp-stdio-utils.tcl does not find any character devices, there is no stdio device.
5.8.3. Specifying the Default System Timer
For more information about this setting, refer to the Nios® II Software Build Tools Reference section.
The script searches the .sopcinfo file for a timer component to use as the default system timer. To be an appropriate system timer, the component must have the following characteristics:
- It must be a timer, that is, is_timer_device must return true.
- It must have a slave port connected to the Nios® II processor.
When the script finds an appropriate system timer component, it sets hal.sys_clk_timer to the timer slave port descriptor. The script prefers a slave port whose descriptor contains the string sys_clk, if one exists. If no appropriate system timer component is found, the script sets hal.sys_clk_timer to none.
5.8.4. Specifying the Default Memory Map
For more information about these commands, refer to the Nios® II Software Build Tools Reference section.
The script chooses the largest volatile memory region as the default memory region. If there is no volatile memory region, bsp-linker-utils.tcl chooses the largest non-volatile memory region. The script assigns the .text, .rodata, .rwdata, .bss, .heap, and .stack section mappings to this default memory region. The script also sets the hal.linker.exception_stack_memory_region BSP setting to the default memory region. The setting is available in case the separate exception stack option is enabled (this setting is disabled by default).
For more information about this setting, refer to the Nios® II Software Build Tools Reference section.
5.8.5. Specifying Default Bootloader Parameters
- hal.linker.allow_code_at_reset
- hal.linker.enable_alt_load_copy_rodata
- hal.linker.enable_alt_load_copy_rwdata
- hal.linker.enable_alt_load_copy_exceptions
For more information about these settings, refer to the Nios® II Software Build Tools Reference section.
5.8.5.1. Boot Loader Dependent Settings
The script examines the .text section mapping and the Nios® II reset slave port. If the .text section is mapped to the same memory as the Nios® II reset slave port and the reset slave port is a flash memory device, the script assumes that a boot loader is being used. You can override this behavior by passing the enable_bootloader option to the default Tcl script.
If a boot loader is enabled, the assumption is that the boot loader is located at the reset address and handles the copying of sections on reset. If there is no boot loader, the BSP might need to provide code to handle these functions. You can use the alt_load() function to implement a boot loader.
Setting name5 | Value When Boot Loader Enabled | Value When Boot Loader Disabled |
---|---|---|
hal.linker.allow_code_at_reset | 0 | |
hal.linker.enable_alt_load_copy_rodata | 0 | if .rodata memory different than .text memory and .rodata memory is volatile; 0 otherwise |
hal.linker.enable_alt_load_copy_rwdata | 0 | if .rwdata memory different than .text memory; 0 otherwise |
hal.linker.enable_alt_load_copy_exceptions | 0 | if .exceptions memory different than .text memory and .exceptions memory is volatile; 0 otherwise |
5.8.6. Using Individual Default Tcl Procedures
The default Tcl script consists of the top-level bsp-call-proc.tcl script plus the helper scripts listed in the "Default Tcl Script Components" table (Table 4–9 on page 4–33). The procedure call Tcl script allows you to call a specific procedure in the helper scripts, if you want to invoke some of the default Tcl functionality without running the entire default Tcl script.
The procedure call Tcl script has the following usage:
bsp-call-proc.tcl <proc-name> [<args>]*
bsp-call-proc.tcl calls the specified procedure with the specified (optional) arguments. Refer to the default Tcl scripts to view the available functions and their arguments. The bsp-call-proc.tcl script includes the same files as the bsp-set-defaults.tcl script, so any function in those included files is available.
5.9. Device Drivers and Software Packages
For more information about integrating device drivers and software packages with the Nios® II SBT, refer to the Developing Device Drivers for the Hardware Abstraction Layer section.
5.10. Boot Configurations for Altera Embedded Software
For more information about the HAL boot loader process, refer to the Developing Programs Using the Hardware Abstraction Layer section.
5.10.1. Memory Types
The IsFlash property of the memory module (defined in the .sopcinfo file) indicates whether the .sopcinfo file identifies the memory as a flash memory device. The IsNonVolatileStorage property indicates whether the .sopcinfo file identifies the memory as a non-volatile storage device. The contents of a non-volatile memory device are fixed and always present.
Memory Type | Examples | IsFlash | IsNonVolatileStorage |
---|---|---|---|
Flash | Common flash interface (CFI), erasable programmable configurable serial (EPCS) device | true | true |
ROM | On-chip memory configured as ROM, HardCopy ROM | false | true |
RAM | On-chip memory configured as RAM, HardCopy RAM, SDRAM, synchronous static RAM (SSRAM) | false | false |
The following sections describe each supported build configuration in detail. The alt_load() facility is HAL code that optionally copies sections from the boot memory to RAM. You can set an option to enable the boot copy. This option only adds the code to your BSP if it needs to copy boot segments. The hal.enable_alt_load setting enables alt_load() and there are settings for each of the three sections it can copy (such as hal.enable_alt_load_copy_rodata). Enabling alt_load() also modifies the memory layout specified in your linker script.
5.10.2. Boot from Flash Configuration
This boot configuration has the following characteristics:
- alt_load() not called
- No code at reset in executable file
The default Tcl script chooses this configuration when the memory associated with the processor reset address is a flash memory and the .text section is mapped to a different memory (for example, SDRAM).
Intel FPGA provides example boot loaders for CFI and EPCS memory in the Nios® II EDS, precompiled to Motorola S-record Files (.srec). You can use one of these example boot loaders, or provide your own.
5.10.3. Boot from Monitor Configuration
This boot configuration has the following characteristics:
- alt_load() not called
- No code at reset in executable file
The default Tcl script assumes no boot loader is in use, so it chooses this configuration only if you enable it. To enable this configuration, pass the following argument to the default Tcl script:enable_bootloader 1
If you are using the nios2-bsp script, call it as follows:
nios2-bsp hal my_bsp --use_bootloader 15.10.4. Run from Initialized Memory Configuration
The reset address points to the beginning of the application in memory (no boot loader). The reset memory must have its contents initialized before the processor comes out of reset. The initialization might be implemented by using a non-volatile reset memory (for example, flash, ROM, initialized FPGA RAM) or by an external master (for example, another processor) that writes the reset memory. The HAL C run-time startup code (crt0) initializes the instruction cache, uses alt_load() to copy select sections to their VMAs, and then jumps to _start. For each associated section (.rwdata, .rodata, .exceptions), Boolean settings control this behavior. The default Tcl scripts set these to default values as described in the "Boot Loader-Dependent Settings" table (Table 4–11 on page 4–36).
alt_load() must copy the .rwdata section (either to another RAM or to a reserved area in the same RAM as the .text RAM) if .rwdata needs to be correct after multiple resets.
This boot configuration has the following characteristics:
- alt_load() called
- Code at reset in executable file
The default Tcl script chooses this configuration when the reset and .text memory are the same.
In this boot configuration, when the processor core resets, by default the .rwdata section is not reinitialized. Reinitialization would normally be done by a boot loader. However, this configuration has no boot loader, because the software is running out of memory that is assumed to be preinitialized before startup.
If your software has a .rwdata section that must be reinitialized at processor reset, turn on the hal.linker.enable_alt_load_copy_rwdata setting in the BSP.
5.10.5. Run-time Configurable Reset Configuration
This boot configuration has the following characteristics:
- alt_load() might be called (depends on boot configuration)
- No code at reset in executable file
Because the processor reset address points to an additional memory, the algorithms used by the default Tcl script to select the appropriate boot configuration might make the wrong choice. The individual BSP settings specified by the default Tcl script need to be explicitly controlled.
5.11. Altera-Provided Embedded Development Tools
5.11.1. Nios II Software Build Tool GUIs
- The Nios® II SBT for Eclipse
- The Nios® II BSP Editor
- The Nios® II Flash Programmer
For more information about how each GUI is primarily a thin layer providing graphical control of the command-line tools, refer to “The Nios II Command-Line Commands” chapter.
Task | Tool | Feature | Nios® II SBT Command Line |
---|---|---|---|
Creating an example Nios® II program | Nios® II SBT for Eclipse | Nios® II Application and BSP from Template wizard | create-this-app script |
Creating an application | Nios® II SBT for Eclipse | Nios® II Application wizard | nios2-app-generate-makefile utility |
Creating a user library | Nios® II SBT for Eclipse | Nios® II Library wizard | nios2-lib-generate-makefile utility |
Creating a BSP | Nios® II SBT for Eclipse | Nios® II Board Support Package wizard |
|
BSP Editor | New BSP Setting File dialog box | ||
Modifying an application | Nios® II SBT for Eclipse | Nios® II Application Properties page | nios2-app-update-makefile utility |
Modifying a user library | Nios® II SBT for Eclipse | Nios® II Library Properties page | nios2-lib-update-makefile utility |
Updating a BSP | Nios® II SBT for Eclipse | Nios® II BSP Properties page |
nios2-bsp-update-settings
utility
nios2-bsp-generate-files utility |
BSP Editor | — | ||
Examining properties of a BSP | Nios® II SBT for Eclipse | Nios® II BSP Properties page | nios2-bsp-query-settings utility |
BSP Editor | — | ||
Programming flash memory | Nios® II Flash Programmer | — | nios2-flash-programmer |
Importing a command-line project | Nios® II SBT for Eclipse | Import dialog box | — |
5.11.1.1. The Nios II SBT for Eclipse
You can launch the Nios® II SBT for Eclipse either of the following ways:
- In the Windows operating system, on the Start menu, point to Programs > Nios® II EDS <version>, and click Nios® II <version> Software Build Tools for Eclipse.
- From the Nios® II Command Shell, by typing eclipse-nios2.
For more information about the Nios® II SBT for Eclipse, refer to the Getting Started with the Graphical User Interface section.
5.11.1.2. The Nios II BSP Editor
- From the Nios® II menu in the Nios® II SBT for Eclipse
- From the Nios® II Command Shell, by typing nios2-bsp-editor.
The Nios® II BSP Editor enables you to edit settings, linker regions, and section mappings, and to select software packages and device drivers.
The capabilities of the Nios® II BSP Editor constitute a large subset of the capabilities of the nios2-bsp-create-settings, nios2-bsp-update-settings, and nios2-bsp-generate-files utilities. Any project created in the BSP Editor can also be created using the command-line utilities.
For more information about the BSP Editor, refer to “Using the BSP Editor” in the Getting Started with the Graphical User Interface section.
5.11.1.3. The Nios II Flash Programmer
- Executable code and data
- Bootstrap code to copy code from flash to RAM, and then run from RAM
- HAL file subsystems
- FPGA hardware configuration data
You can launch the flash programmer either of the following ways:
- From the Nios® II menu in the Nios® II SBT for Eclipse
- From the
Nios® II Command Shell, by
typing:
nios2-flash-programmer-generate
5.11.2. The Nios II Command Shell
For more information, refer to the “GNU Compiler Tool Chain” chapter.
For more information about launching the Nios® II Command Shell, refer to the "Getting Started from the Command Line" chapter.
5.11.3. The Nios II Command-Line Commands
Each tool provides its own documentation in the form of help accessible from the command line. To view the help, open the Nios® II Command Shell, and type the following command: <name of tool> --help
5.11.3.1. GNU Compiler Tool Chain
The Nios® II EDS includes version GCC 4.8.3 of the GCC toolchain.
For more information about installing the Quartus Prime, refer to the Intel FPGA Software Installation and Licensing Manual.
The following options are new for the GCC toolchain:
Code density and performance
Use of the -mgpopt=global setting is recommended as it generally deliver results with better code density *and* performance. (Note: this requires that everything is compiled with the same -Gn switch setting; use of -Gn is not generally recommended).
C++ code size reduction: -fno-exceptions
When a developer is using C++ but trying not to link in the (big) C++ exception-handling machinery, nios2-elf-g++ does, in some cases, link in the exception-handling machinery where it is not actually required. This switch suppresses that behaviour, which results in a smaller code footprint for those situations.
Response to address 0x00 access: -fdelete-null-pointer-checks
Developers often have RAM at address 0x00 (== NULL pointer in gcc and most C compilers). From gcc 4.9 onwards, by default gcc detects attempts to read or write to address 0x00 and converts them to traps; typically in embedded/ Nios® II-based systems, these traps are not handled so the code fails silently. This means that code that works when compiled with earlier versions of gcc could silently fail when compiled with gcc-4.9 (onwards).
In order to avoid this for Nios® II this behavior has been modified so that accesses to address 0x00 works as expected for Nios® II systems but there may be a slight negative effect on code performance. In Nios® II systems that are known not to read/write RAM at address 0x00, use of the switch --fdelete-null-pointer-checks restores the original gcc behavior and may provide a small performance boost.
Expansion of __builtin_trap
The latest versions of GCC now produce trap 3 instead of break 3 in the expansion of the __builtin_trap function and in other situations where a trap is emitted to indicate undefined runtime behaviour. This is for compliance with the Nios® II ABI for Linux targets, which does not permit the use of the break instruction in user code.
GDB breakpoint instruction
GDB now uniformly uses trap 31 instead of a break instruction for software breakpoints. This is for consistency with the Nios® II ABI for Linux targets.
GNU tools for the Nios® II processor are generally named nios2-elf-<tool name>. The following list shows some examples:
- nios2-elf-gcc
- nios2-elf-as
- nios2-elf-ld
- nios2-elf-objdump
- nios2-elf-size
The exception is the make utility, which is simply named make.
The Nios® II GNU tools reside in the following location:
- < Nios® II EDS install path>/bin/gnu directory
Refer to the following additional sources of information:
- For more information about managing GCC toolchains in the SBT for Eclipse— “Managing Toolchains in Eclipse” in the "Getting Started with the Graphical User Interface" chapter.
- For more information about selecting the toolchain on the command line—the "Getting Started from the Command Line" chapter.
- For more information about a comprehensive list of Nios® II GNU tools—the GNU HTML documentation, refer to the Nios® II Embedded Design Suite Support page on the Intel FPGA website.
- For more information about GNU, refer to the Free Software Foundation website.
5.11.3.2. Nios II Software Build Tools
You can call these utilities and scripts on the command line or from the scripting language of your choice (such as perl or bash).
Command | Summary | Utility | Script |
---|---|---|---|
nios2-app-generate-makefile | Creates an application makefile | x | |
nios2-lib-generate-makefile | Creates a user library makefile | x | |
nios2-app-update-makefile | Modifies an existing application makefile | x | |
nios2-lib-update-makefile | Modifies an existing user library makefile | x | |
nios2-bsp-create-settings | Creates a BSP settings file | x | |
nios2-bsp-update-settings | Updates the contents of a BSP settings file | x | |
nios2-bsp-query-settings | Queries the contents of a BSP settings file | x | |
nios2-bsp-generate-files | Generates all files for a given BSP settings file | x | |
nios2-bsp | Creates or updates a BSP | x |
The Nios® II SBT utilities reside in the < Nios® II EDS install path>/sdk2/bin directory.
For more information about the Nios® II SBT, refer to the "Getting Started from the Command Line" chapter.
5.11.3.3. File Format Conversion Tools
- alt-file-convert
- bin2flash
- elf2dat
- elf2flash
- elf2hex
- elf2mif
- flash2dat
The file format conversion tools are in the < Nios® II EDS install path>/bin/ directory.
5.11.3.3.1. alt-file-convert (BETA)
Description
alt-file-convert (BETA): General file conversion tool. For Nios® II, it is primarily used for generating a Nios II application image for Max Onchip Flash and EPCQ.
Usage
alt-file-convert -I <input_type> -O <output_type> [option(s)] --input=<input_file> --output=<output_file>
- Convert between Intel HEX (byte addressed) and Quartus HEX (word addressed)
- Convert between Quartus HEX files of various widths
- Covert an .elf file to a HEX file and append a bootcopier (used for application flash image for Max On-chip Flash and EPCQ
Options
-h, --help - prints usage -I - input type -O - output type --base - base address (in hex) f target memory (default 0x0) --end - end address (in hex) of target memory (default 0xFFFFFFFF) --reset - reset address (in hex) of target memory (default None) --input - path to input file --output - path to output file --in-data-width - data width of inputfile [8, 16, 32, 64, 128, 256] (default 8) --out-data-width - data width of target memory [8, 16, 32, 64, 128, 256] (default None) --boot - location of boot file to be appended (srec format)
Examples
alt-file-convert –I ihex –O hex out-data-width 32 in.ihex out.hex
alt-file-convert –I elf32-littlenios2 –O flash in.elf out.flash –-have-boot-copier –-boot boot.elf
5.11.3.3.2. bin2flash
Description
The bin2flash utility converts any binary data file to a FLASH file that can be used by the flash programmer.
Usage
bin2flash [--debug] [--silent] [--help] [--log=file] [--location=addr] [--quiet] [--input=file] [--verbose] [--output=file]
Options
--debug debug mode --help print this message --input=<file> input Binary file to process --location=<addr> design location within the flash --log=<file> file for logging progress --output=<file> output flash file --quiet only print errors --silent silent mode - same as quiet --verbose lots of interesting information
5.11.3.3.3. elf2dat
Description
Converts a .elf file to a .dat file format appropriate for Verilog HDL hardware simulators.
Usage
elf2dat --infile=file --outfile=file --width=width --base=address --end=address [--pad=number] [--create-lanes=number] [--little-endian-mem] [--big-endian-mem]
Options
--infile=<elf-input-filename> --outfile=<dat-output-filename> --base=<base address> --end=<end address> --pad=[0 | 1] (default 1) --create-lanes=[0 | 1] (default 0) --width=[ 8 | 16 | 32 | 64 | 128] --little-endian-mem --big-endian-mem
Transforms the data within an ELF file in the address range [base, end] into the corresponding DAT file. Lane files are optionally created (--create-lanes=1, default is 0). Lane file names are generated based on the output file by inserting "_lane0", "_lane1", etc. before the ".dat" extension of the output filename. If "--pad=1" is specified, any unspecified locations in memory is filled with zeros. If "--little-endian-mem" is specified, the memory is assumed to be little-endian. If "--big-endian-mem" is specified, the memory is assumed to be big-endian. If neither --little-endian-mem or --big-endian-mem is specified, the memory is assumed to be little-endian. Note that the endianness of the ELF file never effects the result.
Example
elf2dat --infile=foo.elf --outfile=bar.dat --width=32 --create-lanes=1 --base=0 --end=0x1000
creates DAT files bar.dat, bar_lane0.dat, bar_lane1.dat, bar_lane2.dat, bar_lane3.dat
5.11.3.3.4. elf2flash
Description
The elf2flash utility takes a software file in ELF format and translates it to a FLASH file that can be programmed into the flash memory connected to an Intel FPGA.
Usage
elf2flash [--boot=file] [--debug] [--base=addr] [--save] [--quiet] [--epcs] [--end=addr] [--verbose] [--silent] [--help] [--log=file] [--after[=file]] [--input=file] [--reset=addr] [--offset=offset] [--sim_optimize[=value]] [--output=file]
Options
--after[=<file>] Start output at address immediately following data in specified .flash file --base=<addr> flash base address --boot=<file> boot copier SREC file --debug debug mode --end=<addr> flash end address --epcs epcs flash mode --help print this message --input=<file> input ELF file to process --log=<file> file for logging progress --offset=<offset> EPCS offset --output=<file> output flash file --quiet only print errors --reset=<addr> CPU reset address --save save intermediate files --silent silent mode - same as quiet --sim_optimize[=<value>] Optimize for simulation --verbose lots of interesting information
The elf2flash utility converts the software and data within an ELF file in the address range [base, end] into a FLASH file. This utility can also optionally insert a boot copier into the FLASH file to copy the software from flash memory to RAM before running it.
5.11.3.3.5. elf2hex
Description
The elf2hex utility takes a software file in ELF format and translates it to a HEX file that can be used as the initialization data for a memory component.
Usage
elf2hex [--debug] [--record=length] [--base=addr] [--quiet] [--width=value] [--big-endian-mem] [--no-zero-fill] [--create-lanes[=value]] [--lower] [--end=addr] [--verbose] [--silent] [--help] [--log=file] [--input=file] [--little-endian-mem] [--output=file]
Options
--base=<addr> Hex data base address --big-endian-mem Force big-endian memory layout --create-lanes[=<value>] 1 if lane files should be created --debug debug mode --end=<addr> Hex data end address --help print this message --input=<file> input ELF file to process --little-endian-mem Force little-endian memory layout --log=<file> file for logging progress --lower If you prefer your hex in lower case --no-zero-fill No zero fill of empty sections --output=<file> output Hex file --quiet only print errors --record=<length> Output record length, in bytes. --silent silent mode - same as quiet --verbose lots of interesting information --width=<value> [ 8 | 16 | 32 | 39 | 64 | 128]
The elf2hex utility converts the software and data within an ELF file in the address range [base, end] into a HEX file. The width option is used to insure that the resulting HEX file is formatted properly for its corresponding memory component. This utility can also create lane files which are used to initialize multi-laned memory components.
5.11.3.3.6. elf2mif
Description
elf2-h transforms the data within an elf file in the address range [low, high] into the corresponding -H file. Lane files are optionally created (--create-lanes=1, default is 0). Lane file names are generated based on the output file by inserting "_lane0", "_lane1", etc. before the ".-h" extension of the output filename.
Usage
elf2-h elf_file [low_address high_address] [--width=width] [--create-lanes=lanes] [-h_file]
Options
elf_file the elf input file low address beginning of the range to transform high address end of the range to transform --width=width [ 8 | 16 | 32 | 64 | 128] --create-lanes=lanes [0 | 1] (default 0) -h_file the -H file to create
Example
elf2-h foo.elf 0 0x0FFF --width=32 --create_lanes=1 bar.-h
creates -H files—bar.-h, bar_lane0.-h, bar_lane1.-h, bar_lane2.-h, and bar_lane3.-h
5.11.3.3.7. flash2dat
Description
Converts an SRAM Object File (.sof) to a .flash file.
Usage
flash2dat --infile=<flash-input-filename> --outfile=<dat-output-filename> --width=[ 8 | 16 | 32 | 39 | 64 | 128] --base=<base byte-address of range of interest> --end=<last byte-address of range of interest> --pad=<1 if all locations should be represented in output> --create-lanes=<1 if lane files should be created> --relocate-input=<input-data relocation offset (usually=base)> [--little-endian-mem] [--big-endian-mem]
Example
flash2dat --infile=foo.flash --outfile=foo.dat --width=32 --base=0x1000000 \ --end=0x1000FFF --pad=1 --create-lanes=1 --relocate=0x1000000
Creates files foo.dat, foo_lane0.dat, foo_lane1.dat, foo_lane2.dat and foo_lane3.dat. foo.dat contains 4K bytes of data, padded with 0 where data was not present in the .flash file. foo_lane[0123].dat each contain 1K bytes of data from their respective byte lanes. The input .flash file data should be relocated by 0x1000000 to correspond to the specified --base address.
5.11.3.3.8. sof2flash
Description
The sof2flash utility takes an FPGA configuration file in SOF format and translates it to a FLASH file that can be programmed into the flash memory connected to an Intel FPGA.
Usage
sof2flash [--programmingmode=programmingmode] [--debug] [--optionbit=optionbitaddress] [--save] [--quiet] [--pfl] [--epcs] [--epcq128] [--epcq] [--verbose] [--activeparallel] [--timestamp] [--help] [--log=file] [--input=file] [--offset=addr] [--compress] [--options=file] [--output=file]
Options
--activeparallel create parallel flash contents for active parallel programming --compress compress the SOF --debug debug mode --epcq EPCQ flash mode of size 256Mbits --epcq128 EPCQ flash mode of size 128Mbits or less --epcs EPCS flash mode --help print this message --input=<file> input SOF file to process --log=<file> file for logging progress --offset=<addr> design location within the flash --optionbit=<optionbitaddress> Option Bit Address --options=<file> intermediate Options file (for EPCS only) --output=<file> output flash file --pfl Pfl mode --programmingmode=<programmingmode> Programming mode --quiet only print errors --save save intermediate files --timestamp produce a s0 record with timestamp of input file --verbose lots of interesting information
5.11.3.4. Other Command-Line Tools
- nios2-download
- nios2-flash-programmer-generate
- nios2-flash-programmer (64-bit support)
- nios2-gdb-server (64-bit support)
- nios2-terminal (64-bit support)
- validate_zip
- nios2-configure-sof
- jtagconfig
The command-line tools described in this section are in the < Nios® II EDS install path>/bin/ directory.
5.11.3.4.1. nios2-download
Description
This tool prepares a target system for debugging, it checks that the hardware and software are compatible, downloads the software and optionally makes the target processor run the downloaded code.
Usage
nios2-download [-h/--help] [-C/--directory <dir name>] [-c/--cable <cable name>] [-d/--device <device index>] [-i/--instance <instance>] [-r/--reset-target] [-s/--sidp <address> -I/--id <id> -t/--timestamp <timestamp>] [--accept-bad-sysid] [-w/--wait <seconds>] [-g/--go] [--stop] [--tcpport <port> | auto] [--write-gmon <file>] [--jdi <file>] [--cpu_name <name>] [<filename>]
Options
-h/--help Prints this message. -C/--directory <dir name> Change to this directory before running -c/--cable <cable name> Specifies which JTAG cable to use (not needed if you only have one cable). -d/--device <device index> Specifies in which device you want to look for the Nios® II CPU (1 = device nearest TDI etc.) -i/--instance <instance> Specifies the INSTANCE value of the Nios® II CPU JTAG debug module (auto-detected if you specify an ELF file or use --directory to point to one) -r/--reset-target Reset the target SOPC system before use. -s/--sidp <address> Base-address of System ID peripheral on target This base-address must be specified in hex (0x...) -I/--id <system-id-value> Unique ID code for target system -t/--timestamp <time-stamp> Timestamp for target-system (when last generated) --accept-bad-sysid Continue even if the system ID comparison fails <filename.elf> An ELF file to download to the target -w/--wait <seconds> Wait for time specified before starting processor -g/--go Run processor from entry point after downloading. --stop Stop processor (leave it in a paused state). --tcpport <port> | auto Listen on specified TCP port for a connection from GDB (with "auto" a free port is used). --write-gmon <file> Write profiling data to the file specified when the target exits. --jdi <file> Specify which .jdi file to read the INSTANCE value of the Nios® II CPU JTAG debug module from. (if not specified, looks in the same folder as the .ptf file, as specified in generated.sh) --cpu_name <name> CPU module name to use when trying to scan for INSTANCE value from the .jdi file. Uses the name specified in generated.sh if it is not passed in. NOTE: nios2-download needs a .jdi file and a cpu_name to search for the INSTANCE value. This can be supplied through the command line, or searched for with information from generated.sh
If you specify the --go option then the target processor starts before this tool exits. If --go is not specified but a file is downloaded or the target processor needs to be reset then it is left in the paused state. Otherwise the target processor state is left unchanged unless --stop is specified (in which case it is paused). Return codes are: 0 for success; 1 if the system ID did not match; 2 if no Nios® II CPUs are found; a return code of 4 or more indicates an error which needs manual intervention to solve.
5.11.3.4.2. nios2-flash-programmer-generate
Description
The nios2-flash-programmer-generate command converts multiple files to the .flash format and then program them to the designated target flash devices (--program-flash). This is a convenience utility that manages calls to the following command line utilities: bin2flash, elf2flash, sof2flash, and nios2-flash-programmer. This utility also generates a convenience shell script that captures the sequence of conversion and flash programmer command line tool expressions.
Usage
nios2-flash-programmer-generate --sopcinfo <filename> --flash-dir <filepath> [<options>]
Options
--flash-dir <filepath> Path to the directory where the flash files are generated. Use . for the current directory. This command overwrites pre-existing files in <filepath> without warning. --sopcinfo <filename> The SOPC Builder system file (.sopcinfo). Optional Arguments: --accept-bad-sysid Continue even if the system ID comparison fails --add-bin <fname> <flash-slave-desc> <offset> Specify an bin file to convert and program. The filename, target flash slave descriptor, and target offset amount are required. This option can be used multiple times for .sof files. --add-elf <fname> <flash-slave-desc> <extra-elf2flash-arguments> Specify an elf file to convert and program. The filename, and target flash slave descriptor are required. This option can be used multiple times for .elf files. The [<extra-elf2flash-arguments>] can be any of these options supported by 'elf2flash': 'save', 'sim_optimize'. The 'elf2flash' options: 'base', 'boot', 'end', 'reset' have default values computed, but are also supported as [<extra-elf2flash-arguments>] for manual override of those defaults. Do not prepend extra arguments with '--'. --add-sof <fname> <flash-slave-desc> <offset> <extra-sof2flash-arguments> Specify an sof file to convert and program. The filename, target flash slave descriptor, and target offset amount are required. This option can be used multiple times for .sof files. The [<extra-sof2flash-arguments>] can be any of these options supported by 'sof2flash': 'activeparallel', 'compress', 'save', 'timestamp'. Do not prepend extra arguments with '--'. --cable <cable name> Specifies which JTAG cable to use (not needed if you only have one cable). Not used without --program-flash option --cpu <cpu name> The SOPC Builder system file Nios® II CPU name. Not required if only one Nios® II CPU in the system. --debug Sends debug information, exception traces, verbose output, and default information about the command's operation, to stdout. --device <device name> Specifies in which device you want to look for the Nios II debug core ('1' is device nearest TDI etc.). Not used without --program-flash option --erase-first Erase entire flash targets before programming them. Not used without --program-flash option --extended-help Displays full information about this command and its options. --go Run processor from reset vector after program. --help Displays basic information about this command and its options. --id <address> Unique ID code for target system. Not used without --program-flash option --instance <instance value> Specifies the INSTANCE value of the debug core (not needed if there is exactly one on the chain). Not used without --program-flash option --jvm-max-heap-size <value> Optional. The maximum memory size to be used for allocations when running this tool. This value is specified as <size><unit> where unit can be m (or M) for multiples of megabytes or g (or G) for multiples of gigabytes. The default value is 512m. --log <filename> Creates a debug log and write to specified file. Also logs debug information to stdout. --mmu Specifies if the CPU with the corresponding INSTANCE value has an MMU (not needed if there is exactly one CPU in the system). Not used without --program-flash option --program-flash Providing this flag causes calls to nios2-flash-programmer to be generated and executed. This results in flash targets being programmed. --script-dir <filepath> Path to the directory where a shell script of this tools executed command lines is generated. This convenient script can be used in place of this 'nios2-flash-programmer-generate' command. Use . for the current directory. This command overwrites pre-existing files in <filepath> without warning. --sidp <address> Base-address of System ID peripheral on target. Not used without --program-flash option --silent Suppresses information about the command's operation normally sent to stdout. --timestamp <time-stamp>Timestamp for target-system (when last generated). --verbose Sends verbose output, and default information about the command's operation, to stdout. --version Displays the version of this command and exits with a zero exit status.
5.11.3.4.3. nios2-flash-programmer
Description
Programs data to flash memory on the target board.
Usage
nios2-flash-programmer [-h/--help] [-c/--cable <cable name>] [-d/--device <device index>] [-i/--instance <instance>] [-s/--sidp <address>] [-I/--id <id>] [-t/--timestamp <timestamp>] -b/--base <address> [-e/--epcs] <action> [-g/--go] [--dualdie]
Options
-h/--help Print this message -Q/--quiet Don't print anything if everything works --debug Print debug information -c/--cable <cable name> Specifies which JTAG cable to use (not needed if you only have one cable) -d/--device <device index> Specifies in which device you want to look for the Nios® II debug core (1 = device nearest TDI etc.) --dualdie Force override the die size to be dual die. -i/--instance <instance> Specifies the INSTANCE value of the debug core (not needed if there is exactly one on the chain) -s/--sidp <address> Base-address of System ID peripheral on target -I/--id <system-id-value> Unique ID code for target system -t/--timestamp <time-stamp> Timestamp for target-system (when last generated) --accept-bad-sysid Continue even if the system ID comparison fails -b/--base <address> Base address of FLASH/EPCS to operate on -e/--epcs This operation is on an EPCS flash -M/--mmu MMU present in the Nios® II cpu. -E/--erase <start>+<size> Erase a range of bytes in the flash, or the entire --erase-all flash before/instead of programming it. -P/--program Program flash from the input files (the default) --no-keep-nearby Don't preserve bytes which need to be erased but which aren't specified in the input file -Y/--verify Verify that contents of flash match input files <filename>* The names of the file(s) to program or verify -R/--read <file> Read flash contents into file -B/--read-bytes <start>+<size> Specify which bytes to read -g/--go Run processor from reset vector after program.
Input files should be in Motorola S-Record format. Addresses within the files are interpreted as offsets from the base address of the flash. Output files written by the tool are in the same format. The flash programmer supports all CFI flashes which use the AMD programming algorithm (CFI algorithm 2) or the Intel algorithm (1 or 3).
5.11.3.4.4. nios2-flash-programmer (64-bit support)
Description
Programs data to flash memory on the target board.
Usage
nios2-flash-programmer [-h/--help] [-c/--cable <cable name>] [-d/--device <device index>] [-i/--instance <instance>] [-s/--sidp <address>] [-I/--id <id>] [-t/--timestamp <timestamp>] -b/--base <address> [-e/--epcs] <action> [-g/--go] [--dualdie]
Options
-h/--help Print this message -Q/--quiet Don't print anything if everything works --debug Print debug information -c/--cable <cable name> Specifies which JTAG cable to use (not needed if you only have one cable) -d/--device <device index> Specifies in which device you want to look for the Nios® II debug core (1 = device nearest TDI etc.) --dualdie Force override the die size to be dual die. -i/--instance <instance> Specifies the INSTANCE value of the debug core (not needed if there is exactly one on the chain) -s/--sidp <address> Base-address of System ID peripheral on target -I/--id <system-id-value> Unique ID code for target system -t/--timestamp <time-stamp> Timestamp for target-system (when last generated) --accept-bad-sysid Continue even if the system ID comparison fails -b/--base <address> Base address of FLASH/EPCS to operate on -e/--epcs This operation is on an EPCS flash -M/--mmu MMU present in the Nios® II cpu. -E/--erase <start>+<size> Erase a range of bytes in the flash, or the entire --erase-all flash before/instead of programming it. -P/--program Program flash from the input files (the default) --no-keep-nearby Don't preserve bytes which need to be erased but which aren't specified in the input file -Y/--verify Verify that contents of flash match input files <filename>* The names of the file(s) to program or verify -R/--read <file> Read flash contents into file -B/--read-bytes <start>+<size> Specify which bytes to read -g/--go Run processor from reset vector after program.
Input files should be in Motorola S-Record format. Addresses within the files are interpreted as offsets from the base address of the flash. Output files written by the tool are in the same format. The flash programmer supports all CFI flashes which use the AMD programming algorithm (CFI algorithm 2) or the Intel algorithm (1 or 3).
5.11.3.4.5. nios2-gdb-server
Description
Translates GNU debugger (GDB) remote serial protocol packets over Transmission Control Protocol (TCP) to JTAG transactions with a target Nios® II processor.
Usage
nios2-gdb-server [-h/--help] [-c/--cable <cable name>] [-d/--device <device index>] [-i/--instance <instance>] [-s/--sidp <address>] [-I/--id <id>] [-t/--timestamp <timestamp>] [-w/--wait <seconds>] [--no-verify] [-g/--go] [--stop] [--tcpport=<port> | auto] [--tcpdebug] [--tcptimeout <seconds>] [--tcppersist] [--thread-vars <vars>] [--write-gmon <gmonfile>] [--wait-target-exit] <filename.srec>*
Options
-h/--help Print this message
--write-pid <filename> Write the process ID to the file specified
--signal-pid <filename> Send a SIGUSR1 to the other process when ready
-c/--cable <cable name> Specifies which JTAG cable to use (not needed if
you only have one cable)
-d/--device <device index> Specifies in which device you want to look for the
Nios® II OCI core (1 = device nearest TDI etc.)
-i/--instance <instance> Specifies the INSTANCE value of the JTAG debug core
(not needed if there is exactly one on the chain)
-r/--reset-target Always reset the target system before use
-C/--init-cache Always initialize target processor cache before use
-s/--sidp <address> Base-address of System ID peripheral on target
-I/--id <system-id-value> Unique ID code for target system
-t/--timestamp <time-stamp> Timestamp for target-system (when last generated)
--accept-bad-sysid Continue even if the system ID comparison fails
<filename.srec>* S-Record file(s) to download to the target
--no-verify Don't verify after downloading
-w/--wait <seconds> Wait for time specified before starting processor
(signal USR1 terminates the wait early)
-g/--go Run processor from entry point after downloading
--stop Stop processor (leave it in a paused state).
--tcpport <port> | auto Listen on specified TCP port for a connection from
GDB (with "auto" a free port is used).
--tcpdebug Display the GDB remote protocol running over TCP
--tcptimeout <seconds> Timeout if GDB has not connected in time specified
--tcppersist Don't stop when GDB disconnects
--thread-vars <vars> Decode target thread list using specified string
--write-gmon <gmonfile> Wait for target to complete and write GMON data
(if available) to the file specified
--wait-target-exit Wait for target to complete and return target exit
code as our return code if no other errors
- If the GDB remote protocol is enabled then this chooses the state.
- If the --go option is specified then the processor is started.
- If the --stop option is specified then the processor is left paused.
- If a file is downloaded or the processor is reset then it is paused.
- Otherwise, the processor state is restored.
5.11.3.4.6. nios2-gdb-server (64-bit support)
Description
Translates GNU debugger (GDB) remote serial protocol packets over Transmission Control Protocol (TCP) to JTAG transactions with a target Nios® II processor.
Usage
nios2-gdb-server [-h/--help] [-c/--cable <cable name>] [-d/--device <device index>] [-i/--instance <instance>] [-s/--sidp <address>] [-I/--id <id>] [-t/--timestamp <timestamp>] [-w/--wait <seconds>] [--no-verify] [-g/--go] [--stop] [--tcpport=<port> | auto] [--tcpdebug] [--tcptimeout <seconds>] [--tcppersist] [--thread-vars <vars>] [--write-gmon <gmonfile>] [--wait-target-exit] <filename.srec>*
Options
-h/--help Print this message
--write-pid <filename> Write the process ID to the file specified
--signal-pid <filename> Send a SIGUSR1 to the other process when ready
-c/--cable <cable name> Specifies which JTAG cable to use (not needed if
you only have one cable)
-d/--device <device index> Specifies in which device you want to look for the
Nios® II OCI core (1 = device nearest TDI etc.)
-i/--instance <instance> Specifies the INSTANCE value of the JTAG debug core
(not needed if there is exactly one on the chain)
-r/--reset-target Always reset the target system before use
-C/--init-cache Always initialize target processor cache before use
-s/--sidp <address> Base-address of System ID peripheral on target
-I/--id <system-id-value> Unique ID code for target system
-t/--timestamp <time-stamp> Timestamp for target-system (when last generated)
--accept-bad-sysid Continue even if the system ID comparison fails
<filename.srec>* S-Record file(s) to download to the target
--no-verify Don't verify after downloading
-w/--wait <seconds> Wait for time specified before starting processor
(signal USR1 terminates the wait early)
-g/--go Run processor from entry point after downloading
--stop Stop processor (leave it in a paused state).
--tcpport <port> | auto Listen on specified TCP port for a connection from
GDB (with "auto" a free port is used).
--tcpdebug Display the GDB remote protocol running over TCP
--tcptimeout <seconds> Timeout if GDB has not connected in time specified
--tcppersist Don't stop when GDB disconnects
--thread-vars <vars> Decode target thread list using specified string
--write-gmon <gmonfile> Wait for target to complete and write GMON data
(if available) to the file specified
--wait-target-exit Wait for target to complete and return target exit
code as our return code if no other errors
- If the GDB remote protocol is enabled then this chooses the state.
- If the --go option is specified then the processor is started.
- If the --stop option is specified then the processor is left paused.
- If a file is downloaded or the processor is reset then it is paused.
- Otherwise, the processor state is restored.
5.11.3.4.7. nios2-terminal
Description
Performs terminal I/O with a JTAG UART in a Nios® II system.
Usage
nios2-terminal [TERMINAL OPTIONS] [CONNECTION OPTIONS] [TARGET OPTIONS]
Options
Terminal Options
-V, --version display version number -h, --help show this message and exit -v, --verbose show extra information during run (default) -q, --quiet show minimal information --write-pid write process ID to filename specified -w, --wait wait for a signal before starting --flush empty buffers before displaying output --signal-pid send signal to process ID when ready -o, --quit-after=SECS quit after SECS second(s) (default is never) --no-quit-on-ctrl-d don't quit if Ctrl-D received from target -u, --dump=OPTS dump extra debug information for OPTS --gmon write gmon.out file if seen from target --no-gmon do not write gmon.out
Connection Options
-H, --hardware connect to a hardware target (default) -I, --iss launch and connect to iss target -M, --modelsim connect to a modelsim target -U, --uart connect to hardware using a UART --persistent try to reconnect after an I/O error --no-persistent opposite of persistent
Connect to Hardware Options
-c, --cable=CABLE use CABLE JTAG cable (default auto-detect) -d, --device=DEVICE connect to DEVICE device (default auto-detect) -i, --instance=INSTANCE connect to INSTANCE instance (default auto-detect)
Launch and Connect to ISS Options
-f, --elf=FILE launch ISS with FILE in simulation memory -p, --ptf=FILE launch ISS with FILE as system description -g, --debug launch ISS in debug mode waiting for gdb connection at reset or entry point -r, --no-debug launch ISS in run mode -a, --iss-arg=ARG pass additional argument ARG to nios2-iss, may be specified repeatedly
Connect to ModelSim Options
-n, --instance_name=NAME connect to jtag_uart instance name
Connect to Hardware using UART Options
--port=PORT full name of port to connect to (e.g. /dev/com1) --baud-rate=RATE baud rate to connect to UART
5.11.3.4.8. nios2-terminal (64-bit support)
Description
Performs terminal I/O with a JTAG UART in a Nios® II system.
Usage
nios2-terminal [TERMINAL OPTIONS] [CONNECTION OPTIONS] [TARGET OPTIONS]
Options
Terminal Options
-V, --version display version number -h, --help show this message and exit -v, --verbose show extra information during run (default) -q, --quiet show minimal information --write-pid write process ID to filename specified -w, --wait wait for a signal before starting --flush empty buffers before displaying output --signal-pid send signal to process ID when ready -o, --quit-after=SECS quit after SECS second(s) (default is never) --no-quit-on-ctrl-d don't quit if Ctrl-D received from target -u, --dump=OPTS dump extra debug information for OPTS --gmon write gmon.out file if seen from target --no-gmon do not write gmon.out
Connection Options
-H, --hardware connect to a hardware target (default) --persistent try to reconnect after an I/O error --no-persistent opposite of persistent
Connect to Hardware Options
-c, --cable=CABLE use CABLE JTAG cable (default auto-detect) -d, --device=DEVICE connect to DEVICE device (default auto-detect) -i, --instance=INSTANCE connect to INSTANCE instance (default auto-detect)
5.11.3.4.9. validate_zip
Description
This utility checks that the zip file you have chosen is compatible with the Read Only Zip Filing system. It returns 0 if the zip file is compatible, -1 if not.
Usage
validate_zip name_of_zip_file
5.11.3.4.10. nios2-configure-sof
Description
This tool configures an Intel configurable part. If no explicit SOF file is provided then it tries and work out the correct file to use.
Usage
nios2-configure-sof [-h/--help] [-C/--directory <dir name>] [-c/--cable <cable name>] [-d/--device <device index>] [ <filename.sof> ]
Options
-h/--help Prints this message.
-C/--directory <dir name> Change to this directory before running
-c/--cable <cable name> Specifies which JTAG cable to use (not needed if
you only have one cable).
-d/--device <device index> Specifies in which device you want to look for the
Nios® II CPU (1 = device nearest TDI etc.)
<filename.sof> The SOF file you want to download
If you have exactly one cable attached then nios2-configure-sof uses this cable by default. If you have more than one cable attached then you must specify one. Use `jtagconfig` to find out which cables you have available. If a SOF file is specified, then that file is configured into the part. If no file is specified, or if the specified filename does not have a path associated with it then the tool searches for matching SOF files, first in the current directory and then in the directory which contains the PTF file for the project in the current directory.
5.11.3.4.11. jtagconfig
Description
Allows you configure the JTAG server on the host machine. It can also detect a JTAG chain and set up the download hardware configuration.
Usage
jtagconfig [--enum] jtagconfig --add <type> <port> [<name>] jtagconfig --remove <cable> jtagconfig --getparam <cable> <param> jtagconfig --setparam <cable> <param> <value> jtagconfig --define <jtagid> <name> <irlength> jtagconfig --undefine <jtagid> <name> <irlength> jtagconfig --defined jtagconfig --addserver <server> <password> jtagconfig --enableremote <password> jtagconfig --disableremote jtagconfig --version jtagconfig --help jtagconfig --extrahelp
Options
--version | -v Displays the version of the jtagconfig utility you are using. --help | -h Displays the options for the jtagconfig utility. --extrahelp Displays this help information. --enum Displays the JTAG ID code for the devices in each JTAG chain attached to programming hardware. If the JTAG Server recognizes a device, it displays the device name. If the JTAG Server cannot use a device, it marks the device with an exclamation mark (!). The following code is an example of output from the 'jtagconfig --enum' command: 1) ByteBlasterMV on LPT1 090010DD EPXA10 049220DD EPXA_ARM922 04000101 ! 090000DD ! EP20K1000E 04056101 ! 010020DD EPC2 010020DD EPC2 010020DD EPC2 In this example, the JTAG Server does not recognize two of the eight devices, and cannot use three devices. If you need to use one of the unused devices then use the --define option to define unused devices with JTAG IDs. You can also use this option by typing the command 'jtagconfig' without an argument. --add <hardware> Specifies the port to which you attached new programming <port> [<name>] hardware. For example, 'jtagconfig --add byteblastermv lpt1' specifies that you attached a ByteBlasterMV cable to port LPT1. You can also use '[<name>]' to add a string that describes the hardware to the output from the 'jtagconfig --enum' command. The JTAG Server automatically detects cables that you attach to a USB port, therefore you do not need to use this command for these cables. --remove <cable> Removes the hardware setup that is indicated with the number listed for the hardware in the output of the '--enum' command. In the example for the '--enum' command, above, the number '1)' is listed for the ByteBlasterMV cable. Therefore, the command-line 'jtagconfig --remove 1' removes the hardware setup for the ByteBlasterMV cable. If the hardware specified is attached to a remote JTAG server then the connection to the remote JTAG server is removed instead. --getparam Get a hardware specific parameter from the cable specified. <cable> <param> The parameters supported vary by cable type, see the documentation for your cable for details. --setparam Set a hardware specific parameter on the cable specified. <cable> <param> The parameters supported vary by cable type, see the <value> documentation for your cable for details. This command can only set numeric parameters (the suffixes k and M are recognized when parsing the value). --define <jtagid> Tells the JTAG server about the name and IR length of a new <name> <irlength> device. This is stored and used in future enumerations to reduce the number of devices which cannot be used --undefine Tells the JTAG server to remove information about the name <jtagid> <name> and IR length of a device. --defined Displays the JTAG IDs, names and IR lengths of all non-Intel FPGA devices known about by the JTAG server. --addserver Tells Quartus to connect to the remote JTAG server and make <servername> all cables on that server available to local applications. <password> An IP address or DNS name may be used to specify the server to connect to. The password given here must match the password used on the remote server. --enableremote Tells the JTAG server to allow connections from remote <password> machines. These machines must specify the same password when connecting. --disableremote Tells the JTAG server not to accept any more connections from remote machines. Remote connections currently in use are not terminated.
5.12. Restrictions
6. Overview of the Hardware Abstraction Layer
The HAL serves as a device driver package for Nios® II processor systems, providing a consistent interface to the peripherals in your system. The Nios® II software development tools extract system information from your SOPC Information File (.sopcinfo). The Nios® II Software Build Tools (SBT) generate a custom HAL board support package (BSP) specific to your hardware configuration. Changes in the hardware configuration automatically propagate to the HAL device driver configuration. As a result, changes in the underlying hardware are prevented from creating bugs.
HAL device driver abstraction provides a clear distinction between application and device driver software. This driver abstraction promotes reusable application code that is resistant to changes in the underlying hardware. In addition, the HAL standard makes it straightforward to write drivers for new hardware peripherals that are consistent with existing peripheral drivers.
6.1. Getting Started with the Hardware Abstraction Layer
The easiest way to get started using the HAL is to create a software project. In the process of creating a new project, you also create a HAL BSP. You do not need to create or copy HAL files, nor edit any of the HAL source code. The Nios® II SBT generates the HAL BSP for you.
For an example on creating a simple Nios® II HAL software project, refer to the “Getting Started with Nios® II Software in Eclipse” chapter.
In the Nios® II SBT command line, you can create an example BSP based on the HAL using one of the create-this-bsp scripts supplied with the Nios II Embedded Design Suite.
You must base the HAL on a specific hardware system. A Nios® II system consists of a Nios® II processor core integrated with peripherals and memory. Nios® II systems are generated by Platform Designer.
If you do not have a custom Nios® II system, you can base your project on an Intel FPGA-provided example hardware system. In fact, you can first start developing projects targeting an Intel FPGA development board, and later re-target the project to a custom board. You can easily change the target hardware system later.
- “Getting Started with Nios® II Software in Eclipse” section or
- "Getting Started from the Command Line" section
6.2. HAL Architecture for Embedded Software Systems
6.2.1. Services
- Integration with the newlib ANSI C standard library—Provides the familiar C standard library functions
- Device drivers—Provides access to each device in the system
- The HAL API—Provides a consistent, standard interface to HAL services, such as device access, interrupt handling, and alarm facilities
- System initialization—Performs initialization tasks for the processor and the runtime environment before main()
- Device initialization—Instantiates and initializes each device in the system before main() runs
6.2.2. Layers of a HAL-Based System
The Layers of a HAL-Based System
6.2.3. Applications versus Drivers
For further details about the HAL, refer to the "Developing Programs Using the Hardware Abstraction Layer" and "Developing Device Drivers for the Hardware Abstraction Layer" chapters.
6.2.4. Generic Device Models
6.2.4.1. Device Model Classes
- Character-mode devices—Hardware peripherals that either or both send or receive characters serially, such as a UART.
- Timer devices—Hardware peripherals that count clock ticks and can generate periodic interrupt requests.
- File subsystems—A mechanism for accessing files stored in physical device(s). Depending on the internal implementation, the file subsystem driver might access the underlying device(s) directly or use a separate device driver. For example, you can write a flash file subsystem driver that accesses flash using the HAL API for flash memory devices.
- Ethernet devices—Devices that provide access to an Ethernet connection for a networking stack such as the Intel FPGA-provided NicheStack TCP/IP Stack - Nios® II Edition. You need a networking stack to use an ethernet device.
- Direct memory access (DMA) devices—Peripherals that perform bulk data transactions from a data source to a destination. Sources and destinations can be memory or another device, such as an Ethernet connection.
- Flash memory devices—Nonvolatile memory devices that use a special programming protocol to store data.
6.2.4.2. Benefits to Application Developers
6.2.4.3. Benefits to Device Driver Developers
6.2.5. C Standard Library—newlib
The HAL integrates the ANSI C standard library in its runtime environment. The HAL uses newlib, an open-source implementation of the C standard library. newlib is a C library for use on embedded systems, making it a perfect match for the HAL and the Nios® II processor. newlib licensing does not require you to release your source code or pay royalties for projects based on newlib.
The ANSI C standard library is well documented.
For more information about the most well-known reference of the ANSI C standard library, refer to the book: The C Programming Language by B. Kernighan and D. Ritchie, published by Prentice Hall. It is also available in over 20 languages.
6.3. Embedded Hardware Supported by the HAL
6.3.1. Nios II Processor Core Support
6.3.2. Supported Peripherals
6.3.2.1. Provide Full HAL Support
- Character mode devices
- UART core
- JTAG UART core
- LCD 16207 display controller
- Flash memory devices
- Common flash interface compliant flash chips
- Intel FPGA’s erasable programmable configurable serial (EPCS) serial configuration device controller
- File subsystems
- Intel FPGA host based file system
- Intel FPGA read-only zip file system
- Timer devices
- Timer core
- DMA devices
- DMA controller core
- Scatter-gather DMA controller core
- Ethernet devices
- Triple Speed Ethernet IP core® function
- Standard Microchip Solutions (SMSC) LAN91C111 10/100 Non-PCI Ethernet Single Chip MAC + PHY
- EPCQ
soft IP peripheral
- Upgraded to add support for x4 mode and L devices, giving faster access to the EPCQ device from Nios or other FPGA based masters
The LAN91C111 and Triple Speed Ethernet components require the MicroC/OS-II runtime environment.
For more information, refer to the "Ethernet and the NicheStack TCP/IP Stack - Nios® II Edition" chapter.
6.3.2.2. Provide Partial HAL Support
Inevitably, certain peripherals have hardware-specific features with usage requirements that do not map well to a general-purpose API. The HAL handles hardware-specific requirements by providing the UNIX-style ioctl() function. Because the hardware features depend on the peripheral, the ioctl() options are documented in the description for each peripheral.
Some peripherals provide dedicated accessor functions that are not based on the HAL generic device models. For example, Intel FPGA provides a general-purpose parallel I/O (PIO) core for use with the Nios II processor system. The PIO peripheral does not fit in any class of generic device models provided by the HAL, and so it provides a header file and a few dedicated accessor functions only.
For complete details regarding software support for a peripheral, refer to the peripheral’s description.
For more information about Intel FPGA-provided peripherals, refer to the Embedded Peripherals IP User Guide.
6.3.3. MPU Support
For more information about handling MPU and other advanced exceptions, refer to the Exception Handling section.
For more information about the MPU hardware implementation, refer to the Programming Model chapter of the Nios® II Processor Reference Handbook.
6.3.4. MMU Support
For more information about the Nios® II MMU, refer to the "Programming Model" chapter of the Nios® II Processor Reference Handbook.
7. Developing Programs Using the Hardware Abstraction Layer
This chapter discusses how to develop embedded programs for the Nios II embedded processor based on the Intel FPGA hardware abstraction layer (HAL). The application program interface (API) for HAL-based systems is readily accessible to software developers who are new to the Nios® II processor. Programs based on the HAL use the ANSI C standard library functions and runtime environment, and access hardware resources with the HAL API’s generic device models. The HAL API largely conforms to the familiar ANSI C standard library functions, though the ANSI C standard library is separate from the HAL. The close integration of the ANSI C standard library and the HAL makes it possible to develop useful programs that never call the HAL functions directly. For example, you can manipulate character mode devices and files using the ANSI C standard library I/O functions, such as printf() and scanf().
For more information, refer to the book: The C Programming Language, Second Edition, by Brian Kernighan and Dennis M. Ritchie (Prentice-Hall).
7.1. HAL BSP Settings
- For more information about the Nios® II SBT for Eclipse, refer to the "Getting Started with the Graphical User Interface" chapter.
- For more information about the Nios® II SBT command line, refer to the " Nios® II Software Build Tools" chapter.
For more information about detailed descriptions of available BSP settings, refer to the " Nios® II Software Build Tools Reference" chapter.
Many HAL settings are reflected in the system.h file, which provides a helpful reference for details about your BSP.
For more information about system.h, refer to the “The system.h System Description File” chapter.
7.2. The Nios II Embedded Project Structure
Every HAL-based Nios® II program consists of two Nios® II projects.
For more information, refer to the figure above. Your application-specific code is contained in one project (the user application project), and it depends on a separate BSP project (the HAL BSP).
The application project contains all the code you develop. The executable image for your program ultimately results from building both projects.
With the Nios® II SBT for Eclipse, the tools create the HAL BSP project when you create your application project. In the Nios® II SBT command line flow, you create the BSP using nios2-bsp or a related tool.
The HAL BSP project contains all information needed to interface your program to the hardware. The HAL drivers relevant to your hardware system are incorporated in the BSP project.
The BSP project depends on the hardware system, defined by a SOPC Information File (.sopcinfo). The Nios® II SBT can keep your BSP up-to-date with the hardware system. This project dependency structure isolates your program from changes to the underlying hardware, and you can develop and debug code without concern about whether your program matches the target hardware.
You can use the Nios® II SBT to update your BSP to match updated hardware. You control whether and when these updates occur.
For more information about how the SBT keeps your BSP up-to-date with your hardware system, refer to “Revising Your BSP” in the " Nios® II Software Build Tools" chapter.
In summary, when your program is based on a HAL BSP, you can always keep it synchronized with the target hardware with a few simple SBT commands.
7.3. The system.h System Description File
The system.h file describes each peripheral in the system and provides the following details:
- The hardware configuration of the peripheral
- The base address
- Interrupt request (IRQ) information (if any)
- A symbolic name for the peripheral
The Nios® II SBT generates the system.h file for HAL BSP projects. The contents of system.h depend on both the hardware configuration and the HAL BSP properties.
For more information about how to control BSP settings, refer to the “HAL BSP Settings” chapter.
Example 6–1. Excerpts from a system.h File Detailing Hardware Configuration Options
/* * sys_clk_timer configuration * */ #define SYS_CLK_TIMER_NAME "/dev/sys_clk_timer" #define SYS_CLK_TIMER_TYPE "altera_avalon_timer" #define SYS_CLK_TIMER_BASE 0x00920800 #define SYS_CLK_TIMER_IRQ 0 #define SYS_CLK_TIMER_ALWAYS_RUN 0 #define SYS_CLK_TIMER_FIXED_PERIOD 0 /* * jtag_uart configuration * */ #define JTAG_UART_NAME "/dev/jtag_uart" #define JTAG_UART_TYPE "altera_avalon_jtag_uart" #define JTAG_UART_BASE 0x00920820 #define JTAG_UART_IRQ 1
7.4. Data Widths and the HAL Type Definitions
The header file alt_types.h defines the HAL type definitions.
Type | Meaning |
---|---|
alt_8 | Signed 8-bit integer. |
alt_u8 | Unsigned 8-bit integer. |
alt_16 | Signed 16-bit integer. |
alt_u16 | Unsigned 16-bit integer. |
alt_32 | Signed 32-bit integer. |
alt_u32 | Unsigned 32-bit integer. |
alt_64 | Signed 64-bit integer. |
alt_u64 | Unsigned 64-bit integer. |
Type | Meaning |
---|---|
char | 8 bits. |
short | 16 bits. |
long | 32 bits. |
int | 32 bits. |
7.5. UNIX-Style Interface
The following list contains all of the available UNIX-style functions:
- _exit()
- close()
- fstat()
- getpid()
- gettimeofday()
- ioctl()
- isatty()
- kill()
- lseek()
- open()
- read()
- sbrk()
- settimeofday()
- stat()
- usleep()
- wait()
- write()
The most commonly used functions are those that relate to file I/O.
For more information, refer to the “File System” chapter.
For more information about the use of these functions, refer to the "HAL API Reference" chapter.
7.6. File System
For more information, refer to an example in the "Read-Only Zip File System" chapter.
You can access files in a HAL-based file system by using either the C standard library file I/O functions in the newlib C library (for example fopen(), fclose(), and fread()), or using the UNIX-style file I/O provided by the HAL.
The HAL provides the following UNIX-style functions for file manipulation:
- close()
- fstat()
- ioctl()
- isatty()
- lseek()
- open()
- read()
- stat()
- write()
For more information about these functions, refer to the "HAL API Reference" chapter.
The HAL registers a file subsystem as a mount point in the global HAL file system. Attempts to access files below that mount point are directed to the file subsystem. For example, if a read-only zip file subsystem (zipfs) is mounted as /mount/zipfs0, the zipfs file subsystem handles calls to fopen() for /mount/zipfs0/myfile.
There is no concept of a current directory. Software must access all files using absolute paths.
The HAL file infrastructure also allows you to manipulate character mode devices with UNIX-style path names. The HAL registers character mode devices as nodes in the HAL file system. By convention, system.h defines the name of a device node as the prefix /dev/ plus the name assigned to the hardware component at system generation time. For example, a UART peripheral that appears as uart1 in Platform Designer is named /dev/uart1 in system.h.
#include <stdio.h> #include <stddef.h> #include <stdlib.h> #define BUF_SIZE (10) int main(void) { FILE* fp; char buffer[BUF_SIZE]; fp = fopen ("/mount/rozipfs/test", "r"); if (fp == NULL) { printf ("Cannot open file.\n"); exit (1); } fread (buffer, BUF_SIZE, 1, fp); fclose (fp); return 0; }
For more information about the use of these functions, refer to the newlib C library documentation installed with the Nios® II EDS. To access the documentation, go to the Windows Start menu, click Programs > Intel FPGA > Nios® II > Nios® II Documentation.
7.7. Using Character-Mode Devices
7.7.1. Standard Input, Standard Output and Standard Error
Example 6–3. Hello World
#include <stdio.h> int main () { printf ("Hello world!"); return 0; }
When using the UNIX-style API, you can use the file descriptors stdin, stdout, and stderr, defined in unistd.h, to access, respectively, the standard in, standard out, and standard error character I/O streams. unistd.h is installed with the Nios® II EDS as part of the newlib C library package.
7.7.2. General Access to Character Mode Devices
#include <stdio.h> #include <string.h> int main (void) { char* msg = "hello world"; FILE* fp; fp = fopen ("/dev/uart1", "w"); if (fp!=NULL) { fprintf(fp, "%s",msg); fclose (fp); } return 0; }
7.7.3. C++ Streams
7.7.4. /dev/null
This device is purely a software construct. It does not relate to any physical hardware device in the system.
7.7.5. Lightweight Character-Mode I/O
For more information, refer to the “Reducing Code Footprint in Embedded Systems” chapter.
7.7.6. Altera Logging Functions
When Intel FPGA logging is enabled, your software can print extra messages to a specified port with HAL function calls. The logging port, specified in the BSP, can be a UART or a JTAG UART device. In its default configuration, Intel FPGA logging prints out boot messages, which trace each step of the boot process.
Several logging options are available, controlled by C preprocessor symbols. You can also choose to add custom logging messages.
Intel FPGA logging functions are conditionally compiled. When logging is disabled, it has no impact on code footprint or performance.
7.7.6.1. Enabling Altera Logging
Logging is enabled by setting hal.log_port to a JTAG UART or a UART device. The setting allows the HAL to send log messages to the specified device.
The build tools also set the ALT_LOG_PORT_TYPE and ALT_LOG_PORT_BASE values in system.h to point to the specified device.
When logging is enabled without special options, the HAL prints out boot messages to the selected port. For typical software that uses the standard alt_main.c (such as the Hello World software example), the messages appear as in the following example.
Example 6–5. Default Boot Logging Output
[crt0.S] Inst & Data Cache Initialized. [crt0.S] Setting up stack and global pointers. [crt0.S] Clearing BSS [crt0.S] Calling alt_main. [alt_main.c] Entering alt_main, calling alt_irq_init. [alt_main.c] Done alt_irq_init, calling alt_os_init. [alt_main.c] Done OS Init, calling alt_sem_create. [alt_main.c] Calling alt_sys_init. [alt_main.c] Done alt_sys_init. Redirecting IO. [alt_main.c] Calling C++ constructors. [alt_main.c] Calling main. [alt_exit.c] Entering _exit() function. [alt_exit.c] Exit code from main was 0. [alt_exit.c] Calling ALT_OS_STOP(). [alt_exit.c] Calling ALT_SIM_HALT(). [alt_exit.c] Spinning forever.
7.7.6.2. Extra Logging Options
Name | Description | |
---|---|---|
System clock log | Purpose | Prints out a message from the system clock interrupt handler at a specified interval. This indicates that the system is still running. The default interval is every 1 second. |
Preprocessor symbol | ALT_LOG_SYS_CLK_ON_FLAG_SETTING | |
Modifiers | The system clock log
has two modifiers, providing two different ways to specify the logging
interval.
|
|
Sample Output |
System Clock On 0
System Clock On 1 |
|
Write echo | Purpose | Every time alt_write() is called (normally, whenever characters are sent to stdout), the first <n> characters are echoed to a logging message. The message starts with the string "Write Echo:". <n> is specified with ALT_LOG_WRITE_ECHO_LEN. The default is 15 characters. |
Preprocessor symbol | ALT_LOG_WRITE_ON_FLAG_SETTING | |
Modifiers | ALT_LOG_WRITE_ECHO_LEN—Number of characters to echo. Default is 15. | |
Sample Output | Write Echo: Hello from Nio | |
JTAG startup log | Purpose | At JTAG UART driver
initialization, print out a line with the number of characters in
the software transmit buffer followed by the JTAG UART control
register contents. The number of characters, prefaced by the string
"SW
CirBuf", might be negative, because it is computed as
(<tail_pointer> – <head_pointer>) on a circular buffer.
For more information about the JTAG UART control register fields, refer to the Embedded Peripherals IP User Guide. |
Preprocessor symbol | ALT_LOG_JTAG_UART_STARTUP_INFO_ON_FLAG_SETTING | |
Modifiers | None | |
Sample Output | JTAG Startup Info: SW CirBuf = 0, HW FIFO wspace=64 AC=0 WI=0 RI=0 WE=0 RE=1 | |
JTAG interval log | Purpose | Creates an alarm object to print out the same JTAG UART information as the JTAG startup log, but at a repeated interval. Default interval is 0.1 second, or 10 messages a second. |
Preprocessor symbol | ALT_LOG_JTAG_UART_ALARM_ON_FLAG_SETTING | |
Modifiers | The JTAG interval log
has two modifiers, providing two different ways to specify the logging
interval.
|
|
Sample Output | JTAG Alarm: SW CirBuf = 0, HW FIFO wspace=45 AC=0 WI=0 RI=0 WE=0 RE=1 | |
JTAG interrupt service routine (ISR) log | Purpose | Prints out a message every time the JTAG UART near-empty interrupt triggers. Message contains the same JTAG UART information as in the JTAG startup log. |
Preprocessor symbol | ALT_LOG_JTAG_UART_ISR_ON_FLAG_SETTING | |
Modifiers | None | |
Sample Output | JTAG IRQ: SW CirBuf = -20, HW FIFO wspace=64 AC=0 WI=1 RI=0 WE=1 RE=1 | |
Boot log | Purpose | Prints out messages tracing the software boot process. The boot log is turned on by default when Intel FPGA logging is enabled. |
Preprocessor symbol | ALT_LOG_BOOT_ON_FLAG_SETTING | |
Modifiers | None | |
Sample Output | For more information, refer to the “Enabling Intel FPGA Logging” chapter . |
Setting a preprocessor flag to 1 enables the corresponding option. Any value other than 1 disables the option.
Several options have modifiers, which are additional preprocessor symbols controlling details of how the options work. For example, the system clock log’s modifiers control the logging interval.
7.7.6.3. Logging Levels
Logging Level | Logging |
---|---|
0 | Boot log (default) |
1 | Level 0 plus system clock log and JTAG startup log |
2 | Level 1 plus JTAG interval log and write echo |
3 | Level 2 plus JTAG ISR log |
-1 | Silent mode—No Intel FPGA logging |
Because each logging option is controlled by an independent preprocessor symbol, individual options in the logging levels can be overridden.
7.7.6.4. Example: Creating a BSP with Logging
- System clock log
- JTAG startup log
- JTAG interval log, logging twice a second
- No write echo
Example 6–6. Creating BSP With Logging and Options
nios2-bsp hal my_bsp ../my_hardware.sopcinfo \ --set hal.log_port uart1 \ --set hal.make.bsp_cflags_user_flags \ -DALT_LOG_FLAGS=2 \ -DALT_LOG_WRITE_ON_FLAG_SETTING=0 \ -DALT_LOG_JTAG_UART_TICKS_DIVISOR=2r
The -DALT_LOG_FLAGS=2 argument adds -DALT_LOG_FLAGS=2 to the ALT_CPP_FLAGS make variable in public.mk.
7.7.6.5. Custom Logging Messages
#include "sys/alt_log_printf.h"
Then use the following macro function:
ALT_LOG_PRINTF(const char *format, ...)
This C preprocessor macro is a pared-down version of printf(). The format argument supports most printf() options. It supports %c, %d %I %o %s %u %x, and %X, as well as some precision and spacing modifiers, such as %-9.3o. It does not support floating point formats, such as %f or %g. This function is not compiled if Intel FPGA logging is not enabled.
If you want your custom logging message to be controlled by Intel FPGA logging preprocessor options, use the appropriate Intel FPGA logging option preprocessor flags from the "ALT_LOG_FLAGS Logging Levels" table (