Intel FPGA SDK for OpenCL Pro Edition: Version 20.4 Release Notes
Version Information
Updated for: |
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Intel® Quartus® Prime Design Suite 20.4 |
1. Intel FPGA SDK for OpenCL Pro Edition Version 20.4 Release Notes
1.1. New Features and Enhancements
The Intel® FPGA SDK for OpenCL™ Pro Edition and the Intel® FPGA RTE for OpenCL Pro Edition include the following new features:
- Enabled the aoc command option -hyper-optimized-handshaking for Intel® Agilex™ device.
1.2. Operating System Support
1.3. Changes to Software Behavior
No changes to the software behavior were made in the current release of the Intel® FPGA SDK for OpenCL™ and the Intel® FPGA RTE for OpenCL.
1.4. Known Issues and Workarounds
This section provides information about known issues that affect the Intel® FPGA SDK for OpenCL™ and the Intel® FPGA RTE for OpenCL Version 20.4.
Description | Workaround |
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When compiling an OpenCL™ kernel containing calls to library functions containing HLS tasks, incremental compile may trigger recompilation for unaffected kernels. | No known workaround. However, this is not a functional bug. It may result in a more conservative incremental compile. |
The emulator runtime emits an assertion error if a kernel is enqueued 16,000 times. | Do not enqueue a kernel more than 16,000 times. |
OpenCL™ kernels with names longer than 61 characters might fail in the Intel® Quartus® Prime Pro Edition compiler with an error similar to the following error: Error (16045): Instance "...|<long_kernel_name>_cra_slave_inst" instantiates undefined entity "<long_kernel_name>_function_cra_slave" File: <filename> Line: <linenumber> |
Reduce the size of the OpenCL™ kernel name. |
OpenCL™ kernel pipes cannot be passed as arguments in some cases. The symptom is the runtime receives a CL_INVALID_BUFFER_SIZE (-61) error when you enqueue your kernel. | Modify your design to use channels instead of pipes. |
When alternatively using sub-buffers and their parent buffers, changes written to one might not be reflected in the other. | Unmapping and mapping a buffer forces the sub-buffers and their parent buffers to be synced. Unmapping and mapping a buffer between buffer uses should prevent this issue. |
This section provides information about known issues that affect the current release of the Intel® FPGA SDK for OpenCL™ Custom Platform Toolkit and Reference Platforms. These issues might also affect Custom Platforms you create for use with the Intel® FPGA SDK for OpenCL™ .
Description | Workaround |
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For Windows, when the host application queries the number of devices,
calls to clGetDeviceIDs return 128
devices regardless of the actual number of devices present. Note: You can find the actual available devices at
the beginning of the device list returned by clGetDeviceIDs.
This issue affects the Intel® Arria® 10 GX FPGA Development Kit Reference Platform and the Intel® Stratix® 10 GX FPGA Development Kit Reference Platform. |
Perform one of the following workarounds:
|
Latest Known Intel® FPGA SDK for OpenCL™ Software Issues
For additional known issue information for the current Intel® FPGA SDK for OpenCL™ version and for previous versions, refer to the Knowledge Base web page.
1.5. Software Issues Resolved
No software issues were reported, corrected or otherwise resolved in the Intel® FPGA SDK for OpenCL™ and the Intel® FPGA RTE for OpenCL Version 20.4.
1.6. Software Patches Included in this Release
No software patches included in this release.
1.7. Intel FPGA SDK for OpenCL Pro Edition Release Notes Archives
1.8. Document Revision History of the Intel FPGA SDK for OpenCL Pro Edition Release Notes
Document Version | Intel® Quartus® Prime Version | Changes |
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2020.12.14 | 20.4 | Initial release. |