Intel® Itanium® System Abstraction Layer Specification, Revision 3.4

Intel® Itanium® System Abstraction Layer Specification, Revision 3.4

Intel® Itanium® System Abstraction Layer Specification, Revision 3.4

Revision 3.4 Document Number: 245359-009 THIS DOCUMENT IS PROVIDED “AS IS” WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE. ® Information in this document is provided in connection with Intel products. No ...license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. ® Intel Itanium processors may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling1-800-548-4725, or by visiting Intel's website at http://www.intel.com. Intel, Pentium, Itanium, and Xeon are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. Copyright © 2000-2008, Intel Corporation. *Other brands and names are the property of their respective owners. 2 ® ® Intel Itanium Processor Family System Abstraction Layer Specification Contents 1 2 3 4 5 6 7 8 Introduction.................................................................................................................7 1.1 Objectives..........................................................................................................7 1.2 Firmware Model ..................................................................................................7 1.3 System Abstraction Layer Overview .......................................................................9 1.4 Firmware Entrypoints......................................................................................... 10 1.5 Related Documents ........................................................................................... 12 1.6 Revision History ................................................................................................ 13 Platform Requirements................................................................................................ 15 2.1 Firmware Address Space .................................................................................... 15 2.2 PAL/SAL ROM Space .......................................................................................... 15 2.3 Simplified Firmware Address Map ........................................................................ 16 2.4 Example Firmware Organization Using a Protected Boot Block ................................. 16 2.5 Firmware Interface Table.................................................................................... 21 2.6 Resources Required for Legacy Compatibility......................................................... 23 2.7 Chipset and Shadowing Requirements.................................................................. 24 2.8 Platform Support for Variant Architectural Features................................................ 24 2.9 Platform Considerations Related to Processor Physical Location................................ 25 2.10 Non-Volatile Memory Requirements ..................................................................... 25 2.11 Miscellaneous Platform Requirements................................................................... 26 Boot Sequence........................................................................................................... 27 3.1 Overview of the Code Flow after Hard Reset.......................................................... 27 3.2 SAL_RESET ...................................................................................................... 28 ® 3.3 Itanium Architecture-based Operating System Loader Requirements ...................... 43 Machine Checks ......................................................................................................... 49 4.1 SAL_CHECK...................................................................................................... 49 4.2 Corrected Machine Checks.................................................................................. 51 4.3 Platform Errors ................................................................................................. 53 4.4 Polling for Corrected Errors................................................................................. 54 4.5 OS_MCA .......................................................................................................... 54 4.6 Procedures Used in Machine Check Handling Read the full Intel® Itanium® System Abstraction Layer Specification, Revision 3.4.

Intel® Itanium® Processor Family SAL Specification

This document describes the functionality of the System Abstraction Layer (SAL) for Itanium® architecture-based systems.

This document specifies requirements to develop platform firmware for Itanium architecture-based systems. A companion document, the Unified Extensible Firmware Interface Specification, describes additional interfaces that must be implemented to access devices on the platform. The Unified Extensible Firmware Interface Specification is a requirement for Itanium architecture-based firmware.

This document is intended for firmware designers, system designers, and writers of diagnostic and low level operating system software. This document is an architectural specification describing the platform-dependent firmware interfaces needed to support the objectives listed below. It does not require a specific implementation, nor is it intended to document PC infrastructure specifications.

The primary objectives of Itanium architecture-based firmware are to:
• Enable boot of Itanium architecture-based operating systems.
• Ensure that the firmware interfaces encapsulate the platform implementation differences within the hardware abstraction layers and device driver layers of operating systems.
• Separate the platform abstraction from the processor abstraction.<BR>• Enable platform differentiation, hardware innovation, and optimization of Itanium architecture-based platforms.
• Support the scaling of systems from the low-end to the high-end including servers, workstations, mainframe alternatives, and supercomputers. Features supported will include high availability, error logging and recovery, large memory support, multiprocessing, and broader and deeper I/O hierarchies (possibly greater than 100 I/O cards).
• While using Itanium instructions is preferred, IA-32 BIOS code can be used in SAL. The extent of the IA-32 BIOS reuse is implementation-dependent, but all SAL entry points from the Processor Abstraction Layer (PAL) will use the Itanium system environment.

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