Intel® Cyclone® 10 GX FPGA

Architecture

Intel® Cyclone® 10 GX FPGA has adopted a column I/O structure with 12.5 Gbps transceivers on the left-hand side of the die. The GPIO in vertical columns are in banks of 48 I/Os, each with a high-efficiency memory controller and I/O phase-locked loop (PLL). Each GPIO bank also supports LVDS pairs, with each pair having differential input and output buffers allowing users to configure the LVDS direction for each pair at 1.4 Gbps.

DSP Blocks

Intel® Cyclone® 10 GX devices are enhances with hardened floating-point operators in the device digital signal processing (DSP) block. The Intel® Cyclone® 10 GX FPGA variable-precision DSP block introduces a new floating-point mode that delivers breakthrough floating-point performance.

With the three modes available for Intel® Cyclone® 10 GX device DSP blocks: Standard-precision fixed-point (18 bit fixed-point mulitpliers), high-precision fixed-point (27 bit fixed-point mulitpliers), and single-precision floating-point, designers can implement a variety of algorithms that require fixed point all the way to double-precision IEEE 754 compliant floating-point operations. Hardened floating-point processing offers designers the ability to implement algorithms in floating point with the similar performance and power efficiency as fixed point. This can be achieved without any power, area, or density compromises and with no loss of fixed-point features or functionality.

Single Event Upset (SEU) Mitigation

Single-event upsets (SEUs) are rare, unintended changes in the state of internal memory elements caused by cosmic radiation effects. The change in state results in a soft error and there is no permanent damage to the device.

Intel® Cyclone® 10 GX FPGAs ensure high reliability and with specific SEU mitigation capabilities.

• Advanced SEU detection (ASD) and correction
• Error detection through cyclic redundancy check (CRC) scrubbing with automatic correction
• Sensitivity processing
  
• Hierarchy tagging
  
• Fault injection
  
• Use to characterize, test, and improve your designs
  

Transceivers (12.5 Gbps)

Intel® Cyclone® 10 GX devices offer up to 12 low-latency transceiver channels with integrated advanced high-speed analog signal conditioning and clock data recovery techniques for chip-to-chip applications.

Intel® Cyclone® 10 GX device offers a maximum frequency of 12.5 Gbps per transceiver I/O for chip-to-chip communications. The Intel® Cyclone® 10 GX device also enables higher rate protocols, such as GigE Vision, USB 3.1, CoaXPress, Camera Link, DisplayPort 1.3, and HDMI in a low-cost solution. Intel® Cyclone® 10 GX devices also support backplane driving at data rates up to 6.6 Gbps.

A column array of transceiver I/O banks on the left-side periphery of the device, each bank contains six transceiver channels. Intel® Cyclone® 10 GX devices also include a PCI Express* Gen2 Hard IP block for applications, such as connecting to an external Intel® processor.

Nios® II Processor

Nios® II processor, the world's most versatile, royalty-free processor according to Gartner Research is the most widely used soft processor in the FPGA industry. The Nios® II processor delivers unprecedented flexibility for your cost-sensitive, real-time, safety-critical (DO-254), and ASIC-optimized applications processing needs.