******************************************************************* * PT-EP1S80-3.7.txt * PIN-OUT INFORMATION FOR EP1S80 * Ver. 3.7 ******************************************************************* Bank Number VREF Bank Pin Name/Function Optional Function(s) Configuration Function B956 F1020 F1508 DQS for x16 DQS for x32 DIFFIO Speed (1) VCCA_PLL7 L23 D31 J31 GND GNDA_PLL7 M23 D32 K31 VCCG_PLL7 J23 D30 L30 GNDG_PLL7 K23 E30 L31 B2 VREF0B2 FPLL7CLKp E31 L29 J38 B2 VREF0B2 FPLL7CLKn D31 L28 J39 B2 VREF0B2 IO P26 B2 VREF0B2 IO R26 B2 VREF0B2 IO DIFFIO_RX75p F34 LOW B2 VREF0B2 IO DIFFIO_RX75n F35 LOW B2 VREF0B2 IO DIFFIO_TX75p T26 LOW B2 VREF0B2 IO DIFFIO_TX75n U26 LOW B2 VREF0B2 IO DIFFIO_RX74p H35 LOW B2 VREF0B2 IO DIFFIO_RX74n H34 LOW B2 VREF0B2 IO DIFFIO_TX74p U27 LOW B2 VREF0B2 IO DIFFIO_TX74n T27 LOW B2 VREF0B2 IO DIFFIO_RX73p G35 LOW B2 VREF0B2 IO DIFFIO_RX73n G34 LOW B2 VREF0B2 IO DIFFIO_TX73p P27 LOW B2 VREF0B2 IO DIFFIO_TX73n R27 LOW B2 VREF0B2 IO DIFFIO_RX72p J34 LOW B2 VREF0B2 IO DIFFIO_RX72n J35 LOW B2 VREF0B2 IO DIFFIO_TX72p T28 LOW B2 VREF0B2 IO DIFFIO_TX72n T29 LOW B2 VREF0B2 VREF0B2 L22 F27 M29 B2 VREF0B2 IO DIFFIO_RX71p D37 LOW B2 VREF0B2 IO DIFFIO_RX71n C38 LOW B2 VREF0B2 IO DIFFIO_TX71p P28 LOW B2 VREF0B2 IO DIFFIO_TX71n R28 LOW B2 VREF0B2 IO DIFFIO_RX70p F36 LOW B2 VREF0B2 IO DIFFIO_RX70n F37 LOW B2 VREF0B2 IO DIFFIO_TX70p N30 LOW B2 VREF0B2 IO DIFFIO_TX70n N31 LOW B2 VREF0B2 IO DIFFIO_RX69p G36 LOW B2 VREF0B2 IO DIFFIO_RX69n G37 LOW B2 VREF0B2 IO DIFFIO_TX69p P31 LOW B2 VREF0B2 IO DIFFIO_TX69n P30 LOW B2 VREF0B2 IO DIFFIO_RX68p H37 LOW B2 VREF0B2 IO DIFFIO_RX68n H36 LOW B2 VREF0B2 IO DIFFIO_TX68p R31 LOW B2 VREF0B2 IO DIFFIO_TX68n R30 LOW B2 VREF0B2 IO DIFFIO_RX67p D39 LOW B2 VREF0B2 IO DIFFIO_RX67n D38 LOW B2 VREF0B2 IO DIFFIO_TX67p K24 G25 M30 HIGH B2 VREF0B2 IO DIFFIO_TX67n J24 G26 M31 HIGH B2 VREF1B2 IO DIFFIO_RX66p E36 LOW B2 VREF1B2 IO DIFFIO_RX66n E37 LOW B2 VREF1B2 IO DIFFIO_TX66p K25 G28 J32 HIGH B2 VREF1B2 IO DIFFIO_TX66n J25 G27 J33 HIGH B2 VREF1B2 IO DIFFIO_RX65p E38 LOW B2 VREF1B2 IO DIFFIO_RX65n E39 LOW B2 VREF1B2 IO DIFFIO_TX65p H24 H28 K32 HIGH B2 VREF1B2 IO DIFFIO_TX65n G24 H27 K33 HIGH B2 VREF1B2 IO DIFFIO_RX64p F38 LOW B2 VREF1B2 IO DIFFIO_RX64n F39 LOW B2 VREF1B2 IO DIFFIO_TX64p H25 J27 L33 HIGH B2 VREF1B2 IO DIFFIO_TX64n G25 J28 L32 HIGH B2 VREF1B2 IO DIFFIO_RX63p G39 LOW B2 VREF1B2 IO DIFFIO_RX63n G38 LOW B2 VREF1B2 IO DIFFIO_TX63p K26 H25 M32 HIGH B2 VREF1B2 IO DIFFIO_TX63n L26 H26 M33 HIGH B2 VREF1B2 IO DIFFIO_RX62p H39 LOW B2 VREF1B2 IO DIFFIO_RX62n H38 LOW B2 VREF1B2 IO DIFFIO_TX62p J26 J25 N32 HIGH B2 VREF1B2 IO DIFFIO_TX62n H26 J26 N33 HIGH B2 VREF1B2 VREF1B2 M22 N29 B2 VREF1B2 IO DIFFIO_TX61p G26 K28 K34 HIGH B2 VREF1B2 IO DIFFIO_TX61n F26 K27 K35 HIGH B2 VREF1B2 IO DIFFIO_TX60p F27 K26 L35 HIGH B2 VREF1B2 IO DIFFIO_TX60n G27 K25 L34 HIGH B2 VREF1B2 IO DIFFIO_RX59p E32 LOW B2 VREF1B2 IO DIFFIO_RX59n E31 LOW B2 VREF1B2 IO DIFFIO_TX59p H27 L27 M34 HIGH B2 VREF1B2 IO DIFFIO_TX59n J27 L26 M35 HIGH B2 VREF1B2 IO DIFFIO_RX58p E29 LOW B2 VREF1B2 IO DIFFIO_RX58n F28 LOW B2 VREF1B2 IO DIFFIO_TX58p K27 M26 N34 HIGH B2 VREF1B2 IO DIFFIO_TX58n L27 M27 N35 HIGH B2 VREF1B2 IO DIFFIO_RX57p F28 F29 K36 HIGH B2 VREF1B2 IO DIFFIO_RX57n G28 F30 K37 HIGH B2 VREF1B2 IO DIFFIO_TX57p L24 M24 P32 HIGH B2 VREF1B2 IO DIFFIO_TX57n M24 M25 P33 HIGH B2 VREF2B2 IO DIFFIO_RX56p J28 F31 J36 HIGH B2 VREF2B2 IO DIFFIO_RX56n H28 F32 J37 HIGH B2 VREF2B2 IO DIFFIO_TX56p L25 N24 P34 HIGH B2 VREF2B2 IO DIFFIO_TX56n M25 N23 P35 HIGH B2 VREF2B2 IO DIFFIO_RX55p D29 G29 L37 HIGH B2 VREF2B2 IO DIFFIO_RX55n E29 G30 L36 HIGH B2 VREF2B2 IO DIFFIO_TX55p P24 N27 R33 HIGH B2 VREF2B2 IO DIFFIO_TX55n N24 N28 R32 HIGH B2 VREF2B2 IO DIFFIO_RX54p F29 H30 K38 HIGH B2 VREF2B2 IO DIFFIO_RX54n G29 H29 K39 HIGH B2 VREF2B2 IO DIFFIO_TX54p N25 P23 R34 HIGH B2 VREF2B2 IO DIFFIO_TX54n P25 P24 R35 HIGH B2 VREF2B2 IO DIFFIO_RX53p H29 G31 M36 HIGH B2 VREF2B2 IO DIFFIO_RX53n J29 G32 M37 HIGH B2 VREF2B2 IO DIFFIO_TX53p M26 N25 T33 HIGH B2 VREF2B2 IO DIFFIO_TX53n N26 N26 T32 HIGH B2 VREF2B2 IO DIFFIO_RX52p D30 H31 L38 HIGH B2 VREF2B2 IO DIFFIO_RX52n E30 H32 L39 HIGH B2 VREF2B2 IO DIFFIO_TX52p M27 P28 T30 HIGH B2 VREF2B2 IO DIFFIO_TX52n N27 P27 T31 HIGH B2 VREF2B2 VREF2B2 N22 L25 P29 B2 VREF2B2 IO DIFFIO_RX51p F30 J29 M38 HIGH B2 VREF2B2 IO DIFFIO_RX51n G30 J30 M39 HIGH B2 VREF2B2 IO DIFFIO_TX51p P27 R28 T34 HIGH B2 VREF2B2 IO DIFFIO_TX51n R27 R27 T35 HIGH B2 VREF2B2 IO DIFFIO_RX50p H30 K30 N36 HIGH B2 VREF2B2 IO DIFFIO_RX50n J30 K29 N37 HIGH B2 VREF2B2 IO DIFFIO_TX50p R26 P25 U35 HIGH B2 VREF2B2 IO DIFFIO_TX50n P26 P26 U34 HIGH B2 VREF2B2 IO DIFFIO_RX49p F31 J32 N38 HIGH B2 VREF2B2 IO DIFFIO_RX49n G31 J31 P38 HIGH B2 VREF2B2 IO DIFFIO_TX49p N23 R23 U33 HIGH B2 VREF2B2 IO DIFFIO_TX49n P23 R24 U32 HIGH B2 VREF2B2 IO DIFFIO_RX48p H31 K31 P39 HIGH B2 VREF2B2 IO DIFFIO_RX48n J31 L32 R38 HIGH B2 VREF2B2 IO DIFFIO_TX48p T25 R25 V35 HIGH B2 VREF2B2 IO DIFFIO_TX48n R25 R26 V34 HIGH B2 VREF2B2 IO DIFFIO_RX47p/RUP2 K28 M28 P36 HIGH B2 VREF2B2 IO DIFFIO_RX47n/RDN2 K29 M29 P37 HIGH B2 VREF2B2 IO DIFFIO_TX47p M23 U31 LOW B2 VREF2B2 IO DIFFIO_TX47n M22 U30 LOW B2 VREF3B2 IO DIFFIO_RX46p M28 L30 R36 HIGH B2 VREF3B2 IO DIFFIO_RX46n L28 L31 R37 HIGH B2 VREF3B2 IO DIFFIO_TX46p N22 U29 LOW B2 VREF3B2 IO DIFFIO_TX46n P22 U28 LOW B2 VREF3B2 IO DIFFIO_RX45p M29 M31 T36 HIGH B2 VREF3B2 IO DIFFIO_RX45n L29 M30 T37 HIGH B2 VREF3B2 IO DIFFIO_TX45p V28 LOW B2 VREF3B2 IO DIFFIO_TX45n V27 LOW B2 VREF3B2 IO DIFFIO_RX44p P28 N29 T39 HIGH B2 VREF3B2 IO DIFFIO_RX44n N28 N30 T38 HIGH B2 VREF3B2 IO DIFFIO_TX44p V29 LOW B2 VREF3B2 IO DIFFIO_TX44n V30 LOW B2 VREF3B2 IO DIFFIO_RX43p N29 N31 U36 HIGH B2 VREF3B2 IO DIFFIO_RX43n P29 N32 U37 HIGH B2 VREF3B2 IO DIFFIO_TX43p V32 LOW B2 VREF3B2 IO DIFFIO_TX43n V31 LOW B2 VREF3B2 IO DIFFIO_RX42p L30 P29 U38 HIGH B2 VREF3B2 IO DIFFIO_RX42n K30 P30 U39 HIGH B2 VREF3B2 IO DIFFIO_TX42p V33 LOW B2 VREF3B2 IO DIFFIO_TX42n W34 LOW B2 VREF3B2 VREF3B2 P22 R21 R29 B2 VREF3B2 IO DIFFIO_RX41p N30 P31 V36 HIGH B2 VREF3B2 IO DIFFIO_RX41n M30 P32 V37 HIGH B2 VREF3B2 IO DIFFIO_TX41p V26 LOW B2 VREF3B2 IO DIFFIO_TX41n W26 LOW B2 VREF3B2 IO DIFFIO_RX40p L31 R32 V38 HIGH B2 VREF3B2 IO DIFFIO_RX40n K31 R31 V39 HIGH B2 VREF3B2 IO DIFFIO_TX40p W28 LOW B2 VREF3B2 IO DIFFIO_TX40n W27 LOW B2 VREF3B2 IO DIFFIO_RX39p R30 R30 W39 HIGH B2 VREF3B2 IO DIFFIO_RX39n P30 R29 W38 HIGH B2 VREF3B2 IO DIFFIO_TX39p W29 LOW B2 VREF3B2 IO DIFFIO_TX39n W30 LOW B2 VREF3B2 IO DIFFIO_RX38p P31 T32 W37 HIGH B2 VREF3B2 IO DIFFIO_RX38n R31 T31 W36 HIGH B2 VREF3B2 IO DIFFIO_TX38p W31 LOW B2 VREF3B2 IO DIFFIO_TX38n W32 LOW B2 VREF3B2 CLK0n R28 T30 Y39 B2 VREF3B2 CLK0p R29 T29 Y38 B2 VREF3B2 IO CLK1n T30 T28 Y34 B2 VREF3B2 CLK1p T31 T27 Y35 VCCA_PLL1 R24 T25 AA32 GND GNDA_PLL1 T24 T26 Y31 VCCG_PLL1 R22 R22 Y28 GNDG_PLL1 R23 T22 Y29 VCCA_PLL2 U24 U25 AA30 GND GNDA_PLL2 V24 U26 AA31 VCCG_PLL2 U23 U24 AA28 GNDG_PLL2 V23 T24 AA29 B1 VREF0B1 CLK2p T29 U31 Y37 B1 VREF0B1 CLK2n T28 U32 Y36 B1 VREF0B1 CLK3p U29 U29 AA35 B1 VREF0B1 IO CLK3n U28 U30 AA34 B1 VREF0B1 IO DIFFIO_RX37p U31 U28 AA39 HIGH B1 VREF0B1 IO DIFFIO_RX37n V31 U27 AA38 HIGH B1 VREF0B1 IO DIFFIO_TX37p Y27 LOW B1 VREF0B1 IO DIFFIO_TX37n Y26 LOW B1 VREF0B1 IO DIFFIO_RX36p AB31 V32 AA37 HIGH B1 VREF0B1 IO DIFFIO_RX36n AA31 V31 AA36 HIGH B1 VREF0B1 IO DIFFIO_TX36p Y33 LOW B1 VREF0B1 IO DIFFIO_TX36n AA33 LOW B1 VREF0B1 IO DIFFIO_RX35p V30 V30 AB38 HIGH B1 VREF0B1 IO DIFFIO_RX35n U30 V29 AB39 HIGH B1 VREF0B1 IO DIFFIO_TX35p AA27 LOW B1 VREF0B1 IO DIFFIO_TX35n AA26 LOW B1 VREF0B1 IO DIFFIO_RX34p W30 W32 AB37 HIGH B1 VREF0B1 IO DIFFIO_RX34n Y30 W31 AB36 HIGH B1 VREF0B1 IO DIFFIO_TX34p AB33 LOW B1 VREF0B1 IO DIFFIO_TX34n AB32 LOW B1 VREF0B1 VREF0B1 V22 V21 AE29 B1 VREF0B1 IO DIFFIO_RX33p AA30 W30 AC39 HIGH B1 VREF0B1 IO DIFFIO_RX33n AB30 W29 AC38 HIGH B1 VREF0B1 IO DIFFIO_TX33p AB31 LOW B1 VREF0B1 IO DIFFIO_TX33n AB30 LOW B1 VREF0B1 IO DIFFIO_RX32p V29 Y32 AC37 HIGH B1 VREF0B1 IO DIFFIO_RX32n W29 Y31 AC36 HIGH B1 VREF0B1 IO DIFFIO_TX32p AB28 LOW B1 VREF0B1 IO DIFFIO_TX32n AB29 LOW B1 VREF0B1 IO DIFFIO_RX31p Y29 Y30 AD39 HIGH B1 VREF0B1 IO DIFFIO_RX31n AA29 Y29 AD38 HIGH B1 VREF0B1 IO DIFFIO_TX31p U22 AB27 LOW B1 VREF0B1 IO DIFFIO_TX31n V22 AB26 LOW B1 VREF0B1 IO DIFFIO_RX30p V28 AA31 AD37 HIGH B1 VREF0B1 IO DIFFIO_RX30n W28 AA30 AD36 HIGH B1 VREF0B1 IO DIFFIO_TX30p W21 AC26 LOW B1 VREF0B1 IO DIFFIO_TX30n W22 AC27 LOW B1 VREF0B1 IO DIFFIO_RX29p Y28 AB31 AE37 HIGH B1 VREF0B1 IO DIFFIO_RX29n AA28 AB30 AE36 HIGH B1 VREF0B1 IO DIFFIO_TX29p Y21 AC28 LOW B1 VREF0B1 IO DIFFIO_TX29n Y22 AC29 LOW B1 VREF1B1 IO DIFFIO_RX28p/RUP1 AB29 AA28 AF37 HIGH B1 VREF1B1 IO DIFFIO_RX28n/RDN1 AB28 AA29 AF36 HIGH B1 VREF1B1 IO DIFFIO_TX28p AA22 AC31 LOW B1 VREF1B1 IO DIFFIO_TX28n AB23 AC30 LOW B1 VREF1B1 IO DIFFIO_RX27p AC31 AB32 AE38 HIGH B1 VREF1B1 IO DIFFIO_RX27n AD31 AC31 AF39 HIGH B1 VREF1B1 IO DIFFIO_TX27p V25 V26 AB34 HIGH B1 VREF1B1 IO DIFFIO_TX27n U25 V25 AB35 HIGH B1 VREF1B1 IO DIFFIO_RX26p AE31 AD32 AF38 HIGH B1 VREF1B1 IO DIFFIO_RX26n AF31 AD31 AG38 HIGH B1 VREF1B1 IO DIFFIO_TX26p U26 V28 AC32 HIGH B1 VREF1B1 IO DIFFIO_TX26n T26 V27 AC33 HIGH B1 VREF1B1 IO DIFFIO_RX25p AC30 AC29 AG37 HIGH B1 VREF1B1 IO DIFFIO_RX25n AD30 AC30 AG36 HIGH B1 VREF1B1 IO DIFFIO_TX25p T27 W25 AC34 HIGH B1 VREF1B1 IO DIFFIO_TX25n U27 W26 AC35 HIGH B1 VREF1B1 IO DIFFIO_RX24p AF30 AD30 AH39 HIGH B1 VREF1B1 IO DIFFIO_RX24n AE30 AD29 AH38 HIGH B1 VREF1B1 IO DIFFIO_TX24p V26 W27 AD34 HIGH B1 VREF1B1 IO DIFFIO_TX24n W26 W28 AD35 HIGH B1 VREF1B1 VREF1B1 W22 AA23 AF29 B1 VREF1B1 IO DIFFIO_RX23p AG30 AE32 AH37 HIGH B1 VREF1B1 IO DIFFIO_RX23n AH30 AE31 AH36 HIGH B1 VREF1B1 IO DIFFIO_TX23p W24 V24 AD33 HIGH B1 VREF1B1 IO DIFFIO_TX23n Y24 V23 AD32 HIGH B1 VREF1B1 IO DIFFIO_RX22p AC29 AE30 AJ39 HIGH B1 VREF1B1 IO DIFFIO_RX22n AD29 AE29 AJ38 HIGH B1 VREF1B1 IO DIFFIO_TX22p W25 Y26 AD31 HIGH B1 VREF1B1 IO DIFFIO_TX22n Y25 Y25 AD30 HIGH B1 VREF1B1 IO DIFFIO_RX21p AE29 AF32 AJ37 HIGH B1 VREF1B1 IO DIFFIO_RX21n AF29 AF31 AJ36 HIGH B1 VREF1B1 IO DIFFIO_TX21p Y26 Y28 AE35 HIGH B1 VREF1B1 IO DIFFIO_TX21n AA26 Y27 AE34 HIGH B1 VREF1B1 IO DIFFIO_RX20p AH29 AF30 AK38 HIGH B1 VREF1B1 IO DIFFIO_RX20n AG29 AF29 AK39 HIGH B1 VREF1B1 IO DIFFIO_TX20p W23 W23 AE33 HIGH B1 VREF1B1 IO DIFFIO_TX20n Y23 W24 AE32 HIGH B1 VREF1B1 IO DIFFIO_RX19p AC28 AG31 AK37 HIGH B1 VREF1B1 IO DIFFIO_RX19n AD28 AG32 AK36 HIGH B1 VREF1B1 IO DIFFIO_TX19p V27 Y23 AF35 HIGH B1 VREF1B1 IO DIFFIO_TX19n W27 Y24 AF34 HIGH B1 VREF2B1 IO DIFFIO_RX18p AE28 AG30 AL37 HIGH B1 VREF2B1 IO DIFFIO_RX18n AF28 AG29 AL36 HIGH B1 VREF2B1 IO DIFFIO_TX18p Y27 AA25 AF33 HIGH B1 VREF2B1 IO DIFFIO_TX18n AA27 AA24 AF32 HIGH B1 VREF2B1 IO DIFFIO_RX17p AH32 LOW B1 VREF2B1 IO DIFFIO_RX17n AH31 LOW B1 VREF2B1 IO DIFFIO_TX17p AB27 AA27 AG35 HIGH B1 VREF2B1 IO DIFFIO_TX17n AC27 AA26 AG34 HIGH B1 VREF2B1 IO DIFFIO_RX16p AG25 LOW B1 VREF2B1 IO DIFFIO_RX16n AG26 LOW B1 VREF2B1 IO DIFFIO_TX16p AE27 AB27 AG33 HIGH B1 VREF2B1 IO DIFFIO_TX16n AD27 AB26 AG32 HIGH B1 VREF2B1 IO DIFFIO_RX15p AH29 LOW B1 VREF2B1 IO DIFFIO_RX15n AG28 LOW B1 VREF2B1 IO DIFFIO_TX15p AG27 AC25 AH34 HIGH B1 VREF2B1 IO DIFFIO_TX15n AF27 AC26 AH35 HIGH B1 VREF2B1 IO DIFFIO_TX14p AB26 AC27 AK35 HIGH B1 VREF2B1 IO DIFFIO_TX14n AC26 AC28 AK34 HIGH B1 VREF2B1 VREF2B1 Y22 AB25 AG29 B1 VREF2B1 IO DIFFIO_RX13p AM39 LOW B1 VREF2B1 IO DIFFIO_RX13n AM38 LOW B1 VREF2B1 IO DIFFIO_TX13p AD26 AD28 AH33 HIGH B1 VREF2B1 IO DIFFIO_TX13n AE26 AD27 AH32 HIGH B1 VREF2B1 IO DIFFIO_RX12p AN39 LOW B1 VREF2B1 IO DIFFIO_RX12n AN38 LOW B1 VREF2B1 IO DIFFIO_TX12p AA25 AD26 AJ35 HIGH B1 VREF2B1 IO DIFFIO_TX12n AB25 AD25 AJ34 HIGH B1 VREF2B1 IO DIFFIO_RX11p AP38 LOW B1 VREF2B1 IO DIFFIO_RX11n AP39 LOW B1 VREF2B1 IO DIFFIO_TX11p AD25 AE28 AJ33 HIGH B1 VREF2B1 IO DIFFIO_TX11n AC25 AE27 AJ32 HIGH B1 VREF2B1 IO DIFFIO_RX10p AR38 LOW B1 VREF2B1 IO DIFFIO_RX10n AR39 LOW B1 VREF2B1 IO DIFFIO_TX10p AA24 AE25 AK32 HIGH B1 VREF2B1 IO DIFFIO_TX10n AB24 AE26 AK33 HIGH B1 VREF2B1 IO DIFFIO_RX9p AT39 LOW B1 VREF2B1 IO DIFFIO_RX9n AT38 LOW B1 VREF2B1 IO DIFFIO_TX9p AD24 AF27 AL33 HIGH B1 VREF2B1 IO DIFFIO_TX9n AC24 AF28 AL32 HIGH B1 VREF3B1 IO DIFFIO_RX8p AM37 LOW B1 VREF3B1 IO DIFFIO_RX8n AM36 LOW B1 VREF3B1 IO DIFFIO_TX8p AE25 AF26 AH31 HIGH B1 VREF3B1 IO DIFFIO_TX8n AF25 AF25 AH30 HIGH B1 VREF3B1 IO DIFFIO_RX7p AN37 LOW B1 VREF3B1 IO DIFFIO_RX7n AN36 LOW B1 VREF3B1 IO DIFFIO_TX7p AE31 LOW B1 VREF3B1 IO DIFFIO_TX7n AE30 LOW B1 VREF3B1 IO DIFFIO_RX6p AP36 LOW B1 VREF3B1 IO DIFFIO_RX6n AP37 LOW B1 VREF3B1 IO DIFFIO_TX6p AF30 LOW B1 VREF3B1 IO DIFFIO_TX6n AF31 LOW B1 VREF3B1 IO DIFFIO_RX5p AR37 LOW B1 VREF3B1 IO DIFFIO_RX5n AR36 LOW B1 VREF3B1 IO DIFFIO_TX5p AG30 LOW B1 VREF3B1 IO DIFFIO_TX5n AG31 LOW B1 VREF3B1 IO DIFFIO_RX4p AU38 LOW B1 VREF3B1 IO DIFFIO_RX4n AT37 LOW B1 VREF3B1 IO DIFFIO_TX4p AD29 LOW B1 VREF3B1 IO DIFFIO_TX4n AD28 LOW B1 VREF3B1 VREF3B1 AA22 AG27 AH29 B1 VREF3B1 IO DIFFIO_RX3p AL35 LOW B1 VREF3B1 IO DIFFIO_RX3n AL34 LOW B1 VREF3B1 IO DIFFIO_TX3p AD27 LOW B1 VREF3B1 IO DIFFIO_TX3n AD26 LOW B1 VREF3B1 IO DIFFIO_RX2p AM35 LOW B1 VREF3B1 IO DIFFIO_RX2n AM34 LOW B1 VREF3B1 IO DIFFIO_TX2p AE28 LOW B1 VREF3B1 IO DIFFIO_TX2n AE27 LOW B1 VREF3B1 IO DIFFIO_RX1p AN34 LOW B1 VREF3B1 IO DIFFIO_RX1n AN35 LOW B1 VREF3B1 IO DIFFIO_TX1p AF28 LOW B1 VREF3B1 IO DIFFIO_TX1n AF27 LOW B1 VREF3B1 IO DIFFIO_RX0p AP35 LOW B1 VREF3B1 IO DIFFIO_RX0n AP34 LOW B1 VREF3B1 IO DIFFIO_TX0p AF26 LOW B1 VREF3B1 IO DIFFIO_TX0n AE26 LOW B1 VREF3B1 FPLL8CLKn AG31 AB29 AL38 B1 VREF3B1 FPLL8CLKp AH31 AB28 AL39 B1 VREF3B1 IO AG28 B1 VREF3B1 IO AH28 VCCA_PLL8 AB23 AJ31 AJ30 GND GNDA_PLL8 AA23 AJ32 AJ31 VCCG_PLL8 AD23 AJ30 AL31 GNDG_PLL8 AC23 AH30 AK31 B8 VREF0B8 IO AR35 B8 VREF0B8 IO AT36 B8 VREF0B8 IO AG28 AB24 AN32 B8 VREF0B8 IO AR34 B8 VREF0B8 IO AU36 B8 VREF0B8 IO AN33 B8 VREF0B8 IO AL30 B8 VREF0B8 IO AM31 B8 VREF0B8 IO AF26 AC24 AT35 B8 VREF0B8 IO DQ9B7 AK29 AH28 AV34 DQ3B15 DQ1B31 B8 VREF0B8 IO AN31 B8 VREF0B8 IO DQ9B6 AJ29 AK30 AU34 DQ3B14 DQ1B30 B8 VREF0B8 IO AD24 AP33 B8 VREF0B8 IO DQ9B5 AJ28 AJ28 AU33 DQ3B13 DQ1B29 B8 VREF0B8 IO AE24 AC23 AV37 B8 VREF0B8 IO DQ9B4 AL28 AJ29 AW33 DQ3B12 DQ1B28 B8 VREF0B8 IO AA21 AR33 B8 VREF0B8 VREF0B8 AB22 AH27 AJ29 B8 VREF0B8 IO DQ9B3 AH27 AK29 AW34 DQ3B11 DQ1B27 B8 VREF0B8 IO AB22 AK29 B8 VREF0B8 IO DQS9B AK28 AK28 AV33 B8 VREF0B8 IO AJ30 AE24 AP32 B8 VREF0B8 IO DQ9B2 AL27 AL30 AV32 DQ3B10 DQ1B26 B8 VREF0B8 IO AD23 AV35 B8 VREF0B8 IO DQ9B1 AJ27 AL29 AU32 DQ3B9 DQ1B25 B8 VREF0B8 IO AL29 B8 VREF0B8 IO DQ9B0 AK27 AM29 AW32 DQ3B8 DQ1B24 B8 VREF0B8 IO AH28 AF24 AT34 B8 VREF0B8 IO AV36 B8 VREF0B8 IO AP31 B8 VREF1B8 IO AK28 B8 VREF1B8 IO AU35 B8 VREF1B8 IO AT33 B8 VREF1B8 IO AL28 B8 VREF1B8 IO AN30 B8 VREF1B8 IO DQ8B7 AH26 AH26 AU31 DQ3B7 DQ1B23 B8 VREF1B8 IO AM29 B8 VREF1B8 IO DQ8B6 AG26 AJ27 AV31 DQ3B6 DQ1B22 B8 VREF1B8 IO AD22 AG24 AR32 B8 VREF1B8 IO DQ8B5 AK26 AL28 AW31 DQ3B5 DQ1B21 B8 VREF1B8 IO AC22 AP30 B8 VREF1B8 IO DQ8B4 AL26 AK27 AW30 DQ3B4 DQ1B20 B8 VREF1B8 IO AE23 AK27 B8 VREF1B8 IO DQ8B3 AH25 AJ26 AU30 DQ3B3 DQ1B19 B8 VREF1B8 IO AC22 AB21 AW36 B8 VREF1B8 IO DQS8B AJ26 AL27 AV30 DQS3B B8 VREF1B8 IO AF23 AM28 B8 VREF1B8 IO DQ8B2 AK25 AM27 AU29 DQ3B2 DQ1B18 B8 VREF1B8 VREF1B8 AB21 AH25 AJ28 B8 VREF1B8 IO AH27 B8 VREF1B8 IO DQ8B1 AJ25 AM28 AV29 DQ3B1 DQ1B17 B8 VREF1B8 IO AD21 AD22 AL27 B8 VREF1B8 IO DQ8B0 AL25 AK26 AW29 DQ3B0 DQ1B16 B8 VREF1B8 IO AE22 AG23 AT32 B8 VREF1B8 IO AN28 B8 VREF1B8 IO AG27 B8 VREF1B8 IO AN29 B8 VREF1B8 IO AR31 B8 VREF1B8 IO AW35 B8 VREF1B8 IO AR30 B8 VREF1B8 IO AM27 B8 VREF2B8 IO DQ7B7 AG24 AH24 AR28 DQ2B15 DQ1B15 B8 VREF2B8 IO AK26 B8 VREF2B8 IO DQ7B6 AH23 AJ24 AT28 DQ2B14 DQ1B14 B8 VREF2B8 IO AC21 AE22 AL26 B8 VREF2B8 IO DQ7B5 AK24 AJ25 AU28 DQ2B13 DQ1B13 B8 VREF2B8 IO AF22 AT31 B8 VREF2B8 IO DQ7B4 AH24 AK25 AV28 DQ2B12 DQ1B12 B8 VREF2B8 IO AA21 AC21 AH26 B8 VREF2B8 IO DQ7B3 AJ23 AL25 AR27 DQ2B11 DQ1B11 B8 VREF2B8 IO AP29 B8 VREF2B8 IO DQS7B AJ24 AL26 AT27 DQS1B B8 VREF2B8 IO AG22 AP28 B8 VREF2B8 IO DQ7B2 AL24 AK24 AW28 DQ2B10 DQ1B10 B8 VREF2B8 IO AD20 AG21 AG26 B8 VREF2B8 IO DQ7B1 AK23 AM25 AU27 DQ2B9 DQ1B9 B8 VREF2B8 IO AR29 B8 VREF2B8 IO DQ7B0 AL23 AM26 AV27 DQ2B8 DQ1B8 B8 VREF2B8 IO AP27 B8 VREF2B8 VREF2B8 AB20 AH23 AJ27 B8 VREF2B8 IO AG25 B8 VREF2B8 IO AH25 B8 VREF2B8 IO AT30 B8 VREF2B8 IO AM26 B8 VREF2B8 IO FCLK3 AF23 AE21 AT29 B8 VREF2B8 IO FCLK2 AF22 AF21 AN26 B8 VREF2B8 IO AK25 B8 VREF2B8 IO DQ6B7 AG22 AJ23 AR26 DQ2B7 DQ1B7 B8 VREF2B8 IO AN27 B8 VREF2B8 IO DQ6B6 AH22 AL24 AT26 DQ2B6 DQ1B6 B8 VREF2B8 IO AP26 B8 VREF2B8 IO DQ6B5 AK22 AH22 AU26 DQ2B5 DQ1B5 B8 VREF3B8 IO AB20 AF25 B8 VREF3B8 IO DQ6B4 AG21 AM24 AV26 DQ2B4 DQ1B4 B8 VREF3B8 IO PGM2 AF24 AA20 AL25 B8 VREF3B8 IO DQ6B3 AH21 AK23 AW26 DQ2B3 DQ1B3 B8 VREF3B8 IO AD21 AM25 B8 VREF3B8 IO DQS6B AJ22 AJ22 AU25 DQS2B B8 VREF3B8 IO AD20 AF24 B8 VREF3B8 IO DQ6B2 AL22 AL23 AT25 DQ2B2 DQ1B2 B8 VREF3B8 IO CRC_ERROR AE21 AF20 AN25 B8 VREF3B8 IO DQ6B1 AJ21 AK22 AR25 DQ2B1 DQ1B1 B8 VREF3B8 IO AP25 B8 VREF3B8 IO DQ6B0 AK21 AL22 AV25 DQ2B0 DQ1B0 B8 VREF3B8 IO RDN8 AE23 AC20 AH24 B8 VREF3B8 IO RUP8 AG25 AH19 AF23 B8 VREF3B8 IO AJ24 B8 VREF3B8 IO AL24 B8 VREF3B8 IO AN24 B8 VREF3B8 IO AM24 B8 VREF3B8 VREF3B8 AB19 AH21 AJ26 B8 VREF3B8 IO AG24 B8 VREF3B8 IO AC20 AE20 AK24 B8 VREF3B8 IO DQ5B7 AG20 AM22 AT24 B8 VREF3B8 IO AP24 B8 VREF3B8 IO DQ5B6 AH20 AJ21 AU24 B8 VREF3B8 IO AE20 AG20 AR24 B8 VREF3B8 IO DQ5B5 AK20 AK21 AV24 B8 VREF3B8 IO AD19 AB19 AG23 B8 VREF3B8 IO DQ5B4 AL20 AL21 AW24 B8 VREF3B8 IO RDYnBSY AG23 AA19 AH23 B8 VREF3B8 IO DQ5B3 AG19 AH20 AW23 B8 VREF3B8 IO AK18 AP23 B8 VREF4B8 IO DQS5B AJ20 AJ20 AU23 B8 VREF4B8 IO AC19 AD19 AK23 B8 VREF4B8 IO DQ5B2 AH19 AK20 AR23 B8 VREF4B8 IO nCS AF20 AC19 AL23 B8 VREF4B8 IO DQ5B1 AJ19 AL20 AV23 B8 VREF4B8 IO AE18 AJ18 AM23 B8 VREF4B8 IO DQ5B0 AK19 AM20 AT23 B8 VREF4B8 IO AF22 B8 VREF4B8 IO CS AF21 AG19 AJ23 B8 VREF4B8 IO AE19 AG22 B8 VREF4B8 IO AN23 B8 VREF4B8 IO AR22 B8 VREF4B8 IO AH22 B8 VREF4B8 IO AF21 B8 VREF4B8 IO AA19 AH18 AJ22 B8 VREF4B8 IO AL22 B8 VREF4B8 IO AP22 B8 VREF4B8 IO AN22 B8 VREF4B8 VREF4B8 AB18 AJ25 B8 VREF4B8 IO CLK5n AH18 AJ19 AU22 B8 VREF4B8 CLK5p AJ18 AK19 AT22 B8 VREF4B8 IO CLK4n AK18 AL19 AW22 B8 VREF4B8 CLK4p AL18 AM19 AV22 B8 VREF4B8 PLL_ENA PLL_ENA AF19 AF19 AM22 B8 VREF4B8 MSEL0 MSEL0 AF18 AG18 AP21 B8 VREF4B8 MSEL1 MSEL1 AG18 AE18 AG21 B8 VREF4B8 MSEL2 MSEL2 AG17 AE19 AM21 B12 VREF4B8 IO PLL6_OUT3n AL17 AM18 AV20 B12 VREF4B8 IO PLL6_OUT3p AK17 AL18 AW20 B12 VREF4B8 IO PLL6_OUT2n AJ17 AK17 AW21 B12 VREF4B8 IO PLL6_OUT2p AH17 AJ17 AV21 B11 VREF4B8 IO PLL6_FBn AJ15 AM17 AU20 B11 VREF4B8 IO PLL6_FBp AH15 AL17 AT20 B11 VREF4B8 IO PLL6_OUT1n AL15 AK16 AU21 B11 VREF4B8 IO PLL6_OUT1p AK15 AJ16 AT21 B11 VREF4B8 IO PLL6_OUT0n AL16 AM16 AU19 B11 VREF4B8 IO PLL6_OUT0p AK16 AL16 AT19 B12 VCC_PLL6_OUTB AC18 AB17 AH21 B11 VCC_PLL6_OUTA AD17 AE17 AJ21 VCCA_PLL6 AB17 AG17 AK21 GND GNDA_PLL6 AC17 AH17 AL20 VCCG_PLL6 AD15 AD16 AJ20 GNDG_PLL6 AD16 AB16 AH20 VCCA_PLL12 AC14 AG16 AK19 GND GNDA_PLL12 AD14 AH16 AL19 VCCG_PLL12 AC15 AF16 AJ19 GNDG_PLL12 AB15 AE16 AH19 B7 VREF0B7 CLK7p AJ14 AM15 AW18 B7 VREF0B7 IO CLK7n AH14 AL15 AV18 B7 VREF0B7 CLK6p AL14 AK15 AW19 B7 VREF0B7 IO CLK6n/PLL12_OUT AK14 AJ15 AV19 B7 VREF0B7 nCE nCE AF17 AF18 AN20 B7 VREF0B7 nCEO nCEO AF16 AH15 AP20 B7 VREF0B7 IO AF20 B7 VREF0B7 IO AG19 B7 VREF0B7 IO PGM0 AE17 AD18 AG20 B7 VREF0B7 nIO_PULLUP nIO_PULLUP AE16 AF15 AR20 B7 VREF0B7 VCCSEL VCCSEL AE15 AJ14 AM19 B7 VREF0B7 PORSEL PORSEL AG16 AG15 AN19 B7 VREF0B7 IO AK18 B7 VREF0B7 IO AF19 B7 VREF0B7 IO INIT_DONE AF15 AE15 AL18 B7 VREF0B7 IO AM18 B7 VREF0B7 IO AP19 B7 VREF0B7 IO AR19 B7 VREF0B7 VREF0B7 AB14 AH12 AJ15 B7 VREF0B7 IO AH18 B7 VREF0B7 IO AG18 B7 VREF0B7 IO AJ18 B7 VREF0B7 IO AH16 AC18 AP18 B7 VREF0B7 IO AN18 B7 VREF0B7 IO AR18 B7 VREF0B7 IO AG17 B7 VREF0B7 IO AH17 B7 VREF0B7 IO AA16 AA18 AF18 B7 VREF0B7 IO nRS AE14 AB18 AL17 B7 VREF0B7 IO AT18 B7 VREF0B7 IO DQ4B7 AK13 AL13 AU17 B7 VREF0B7 IO AA15 AC15 AJ17 B7 VREF0B7 IO DQ4B6 AG13 AM13 AR17 B7 VREF0B7 IO RUnLU AJ16 AF14 AK17 B7 VREF0B7 IO DQ4B5 AH13 AH13 AT17 B7 VREF0B7 IO AD15 AU18 B7 VREF0B7 IO DQ4B4 AJ13 AJ13 AV17 B7 VREF1B7 IO AC13 AE14 AF17 B7 VREF1B7 IO DQ4B3 AK12 AK13 AV16 B7 VREF1B7 IO PGM1 AG15 AG14 AF16 B7 VREF1B7 IO DQS4B AJ12 AJ12 AU16 B7 VREF1B7 IO AD13 AK14 AM17 B7 VREF1B7 IO DQ4B2 AL12 AK12 AW17 B7 VREF1B7 IO AB15 AG16 B7 VREF1B7 IO DQ4B1 AG12 AL12 AT16 B7 VREF1B7 IO DEV_CLRn AF14 AH14 AN17 B7 VREF1B7 IO DQ4B0 AH12 AM11 AW16 B7 VREF1B7 IO AE13 AL14 AM16 B7 VREF1B7 IO AP16 B7 VREF1B7 VREF1B7 AB13 AJ14 B7 VREF1B7 IO AK16 B7 VREF1B7 IO AH16 B7 VREF1B7 IO AL16 B7 VREF1B7 IO AJ16 B7 VREF1B7 IO RDN7 AG14 AC14 AP17 B7 VREF1B7 IO RUP7 AF13 AF13 AN16 B7 VREF1B7 IO DQ3B7 AL10 AL10 AT15 DQ1B15 DQ0B31 B7 VREF1B7 IO AE13 AF15 B7 VREF1B7 IO DQ3B6 AJ11 AK11 AR15 DQ1B14 DQ0B30 B7 VREF1B7 IO AD14 AP15 B7 VREF1B7 IO DQ3B5 AK11 AL11 AV15 DQ1B13 DQ0B29 B7 VREF1B7 IO AA13 AG13 AR16 B7 VREF1B7 IO DQ3B4 AG11 AK10 AV14 DQ1B12 DQ0B28 B7 VREF1B7 IO AC12 AG15 B7 VREF1B7 IO DQ3B3 AH11 AM9 AW14 DQ1B11 DQ0B27 B7 VREF1B7 IO AA15 AM15 B7 VREF1B7 IO DQS3B AJ10 AJ11 AU15 DQS1B B7 VREF1B7 IO AA11 AG12 AN15 B7 VREF2B7 IO DQ3B2 AG10 AL9 AR14 DQ1B10 DQ0B26 B7 VREF2B7 IO AB14 AK15 B7 VREF2B7 IO DQ3B1 AH10 AJ10 AT14 DQ1B9 DQ0B25 B7 VREF2B7 IO AD13 AL15 B7 VREF2B7 IO DQ3B0 AK10 AH11 AU14 DQ1B8 DQ0B24 B7 VREF2B7 IO AP14 B7 VREF2B7 IO AH15 B7 VREF2B7 IO AG14 B7 VREF2B7 IO AM14 B7 VREF2B7 IO AR11 B7 VREF2B7 IO FCLK5 AF12 AM14 AN14 B7 VREF2B7 IO FCLK4 AF11 AF12 AT11 B7 VREF2B7 VREF2B7 AB12 AH10 AJ13 B7 VREF2B7 IO AH14 B7 VREF2B7 IO DQ2B7 AL8 AL8 AT13 DQ1B7 DQ0B23 B7 VREF2B7 IO AD12 AC13 AP12 B7 VREF2B7 IO DQ2B6 AK9 AJ9 AU13 DQ1B6 DQ0B22 B7 VREF2B7 IO AP13 B7 VREF2B7 IO DQ2B5 AL9 AK9 AV13 DQ1B5 DQ0B21 B7 VREF2B7 IO AC11 AA14 AG13 B7 VREF2B7 IO DQ2B4 AH8 AM8 AV12 DQ1B4 DQ0B20 B7 VREF2B7 IO AE12 AE12 AN12 B7 VREF2B7 IO DQ2B3 AK8 AH9 AR13 DQ1B3 DQ0B19 B7 VREF2B7 IO AN13 B7 VREF2B7 IO DQS2B AJ8 AK8 AU12 DQS0B B7 VREF2B7 IO AD11 AD12 AK14 B7 VREF2B7 IO DQ2B2 AG8 AM7 AR12 DQ1B2 DQ0B18 B7 VREF2B7 IO AE11 AF11 AL14 B7 VREF2B7 IO DQ2B1 AH9 AJ8 AT12 DQ1B1 DQ0B17 B7 VREF2B7 IO AG11 AT10 B7 VREF2B7 IO DQ2B0 AJ9 AL7 AW12 DQ1B0 DQ0B16 B7 VREF3B7 IO AR9 B7 VREF3B7 IO AH13 B7 VREF3B7 IO AF10 AB13 AR10 B7 VREF3B7 IO AT8 B7 VREF3B7 IO AM13 B7 VREF3B7 IO AP11 B7 VREF3B7 IO AM12 B7 VREF3B7 IO AC10 AC12 AH12 B7 VREF3B7 IO DQ1B7 AK7 AL6 AV11 DQ0B15 DQ0B15 B7 VREF3B7 IO AE11 AL13 B7 VREF3B7 IO DQ1B6 AL7 AM6 AW11 DQ0B14 DQ0B14 B7 VREF3B7 IO AG9 AG10 AT9 B7 VREF3B7 VREF3B7 AB11 AH8 AJ12 B7 VREF3B7 IO DQ1B5 AH6 AJ7 AU10 DQ0B13 DQ0B13 B7 VREF3B7 IO AG7 AD11 AK13 B7 VREF3B7 IO DQ1B4 AK6 AM5 AW10 DQ0B12 DQ0B12 B7 VREF3B7 IO AE10 AF10 AW5 B7 VREF3B7 IO DQ1B3 AL6 AK7 AU11 DQ0B11 DQ0B11 B7 VREF3B7 IO AN11 B7 VREF3B7 IO DQS1B AJ6 AH7 AV10 DQS0B B7 VREF3B7 IO AD10 AE10 AM11 B7 VREF3B7 IO DQ1B2 AH7 AL5 AW9 DQ0B10 DQ0B10 B7 VREF3B7 IO AF9 AG9 AR8 B7 VREF3B7 IO DQ1B1 AJ7 AK6 AV9 DQ0B9 DQ0B9 B7 VREF3B7 IO AA13 AP10 B7 VREF3B7 IO DQ1B0 AG6 AJ6 AU9 DQ0B8 DQ0B8 B7 VREF3B7 IO AK12 B7 VREF3B7 IO AL12 B7 VREF3B7 IO AT7 B7 VREF3B7 IO AW4 B7 VREF3B7 IO AN10 B7 VREF4B7 IO AL11 B7 VREF4B7 IO AK11 B7 VREF4B7 IO AE9 AB12 AV4 B7 VREF4B7 IO DQ0B7 AL4 AL3 AV8 DQ0B7 DQ0B7 B7 VREF4B7 IO AF9 AP9 B7 VREF4B7 IO DQ0B6 AL5 AL4 AW8 DQ0B6 DQ0B6 B7 VREF4B7 IO AJ2 AE9 AU4 B7 VREF4B7 IO DQ0B5 AJ4 AM4 AW6 DQ0B5 DQ0B5 B7 VREF4B7 IO AH4 AD10 AR7 B7 VREF4B7 IO DQ0B4 AK3 AJ4 AU8 DQ0B4 DQ0B4 B7 VREF4B7 IO AV5 B7 VREF4B7 IO DQ0B3 AK5 AJ5 AW7 DQ0B3 DQ0B3 B7 VREF4B7 VREF4B7 AB10 AH6 AJ11 B7 VREF4B7 IO AG4 AB11 AR6 B7 VREF4B7 IO DQS0B AK4 AK5 AV7 B7 VREF4B7 IO AA12 AP8 B7 VREF4B7 IO DQ0B2 AH5 AH5 AU7 DQ0B2 DQ0B2 B7 VREF4B7 IO AF8 AC11 AU5 B7 VREF4B7 IO DQ0B1 AJ5 AK3 AV6 DQ0B1 DQ0B1 B7 VREF4B7 IO AD9 AL10 B7 VREF4B7 IO DQ0B0 AJ3 AK4 AU6 DQ0B0 DQ0B0 B7 VREF4B7 IO AE8 AT5 B7 VREF4B7 IO AM9 B7 VREF4B7 IO AN9 B7 VREF4B7 IO AV3 B7 VREF4B7 IO AR5 B7 VREF4B7 IO AN7 B7 VREF4B7 IO AF6 AC9 AN8 B7 VREF4B7 IO AT4 B7 VREF4B7 IO AT6 B7 VREF4B7 IO AP7 GNDG_PLL9 AC9 AH3 AK9 VCCG_PLL9 AD9 AJ3 AL9 GNDA_PLL9 AA9 AJ1 AJ9 GND VCCA_PLL9 AB9 AJ2 AJ10 B6 VREF0B6 IO AF13 B6 VREF0B6 IO AF14 B6 VREF0B6 FPLL9CLKp AH1 AB5 AL1 B6 VREF0B6 FPLL9CLKn AG1 AB4 AL2 B6 VREF0B6 IO DIFFIO_TX151n AF12 LOW B6 VREF0B6 IO DIFFIO_TX151p AG12 LOW B6 VREF0B6 IO DIFFIO_RX151n AP6 LOW B6 VREF0B6 IO DIFFIO_RX151p AP5 LOW B6 VREF0B6 IO DIFFIO_TX150n AE12 LOW B6 VREF0B6 IO DIFFIO_TX150p AE13 LOW B6 VREF0B6 IO DIFFIO_RX150n AN5 LOW B6 VREF0B6 IO DIFFIO_RX150p AN6 LOW B6 VREF0B6 IO DIFFIO_TX149n AG10 LOW B6 VREF0B6 IO DIFFIO_TX149p AG9 LOW B6 VREF0B6 IO DIFFIO_RX149n AM6 LOW B6 VREF0B6 IO DIFFIO_RX149p AM5 LOW B6 VREF0B6 IO DIFFIO_TX148n AF10 LOW B6 VREF0B6 IO DIFFIO_TX148p AF9 LOW B6 VREF0B6 IO DIFFIO_RX148n AL6 LOW B6 VREF0B6 IO DIFFIO_RX148p AL5 LOW B6 VREF0B6 VREF0B6 V10 AG6 AE11 B6 VREF0B6 IO DIFFIO_TX147n AE14 LOW B6 VREF0B6 IO DIFFIO_TX147p AD14 LOW B6 VREF0B6 IO DIFFIO_RX147n AR4 LOW B6 VREF0B6 IO DIFFIO_RX147p AR3 LOW B6 VREF0B6 IO DIFFIO_TX146n AE9 LOW B6 VREF0B6 IO DIFFIO_TX146p AE10 LOW B6 VREF0B6 IO DIFFIO_RX146n AT3 LOW B6 VREF0B6 IO DIFFIO_RX146p AU2 LOW B6 VREF0B6 IO DIFFIO_TX145n AC13 LOW B6 VREF0B6 IO DIFFIO_TX145p AD13 LOW B6 VREF0B6 IO DIFFIO_RX145n AP3 LOW B6 VREF0B6 IO DIFFIO_RX145p AP4 LOW B6 VREF0B6 IO DIFFIO_TX144n AD12 LOW B6 VREF0B6 IO DIFFIO_TX144p AD11 LOW B6 VREF0B6 IO DIFFIO_RX144n AN4 LOW B6 VREF0B6 IO DIFFIO_RX144p AN3 LOW B6 VREF0B6 IO DIFFIO_TX143n AC8 AF8 AH10 HIGH B6 VREF0B6 IO DIFFIO_TX143p AD8 AF7 AH9 HIGH B6 VREF0B6 IO DIFFIO_RX143n AM4 LOW B6 VREF0B6 IO DIFFIO_RX143p AM3 LOW B6 VREF1B6 IO DIFFIO_TX142n AF7 AF5 AL8 HIGH B6 VREF1B6 IO DIFFIO_TX142p AE7 AF6 AL7 HIGH B6 VREF1B6 IO DIFFIO_RX142n AT2 LOW B6 VREF1B6 IO DIFFIO_RX142p AT1 LOW B6 VREF1B6 IO DIFFIO_TX141n AB8 AE7 AK7 HIGH B6 VREF1B6 IO DIFFIO_TX141p AA8 AE8 AK8 HIGH B6 VREF1B6 IO DIFFIO_RX141n AR2 LOW B6 VREF1B6 IO DIFFIO_RX141p AR1 LOW B6 VREF1B6 IO DIFFIO_TX140n AC7 AD6 AJ7 HIGH B6 VREF1B6 IO DIFFIO_TX140p AD7 AD5 AJ8 HIGH B6 VREF1B6 IO DIFFIO_RX140n AP1 LOW B6 VREF1B6 IO DIFFIO_RX140p AP2 LOW B6 VREF1B6 IO DIFFIO_TX139n AB7 AE6 AH8 HIGH B6 VREF1B6 IO DIFFIO_TX139p AA7 AE5 AH7 HIGH B6 VREF1B6 IO DIFFIO_RX139n AN2 LOW B6 VREF1B6 IO DIFFIO_RX139p AN1 LOW B6 VREF1B6 IO DIFFIO_TX138n AE6 AD8 AG8 HIGH B6 VREF1B6 IO DIFFIO_TX138p AD6 AD7 AG7 HIGH B6 VREF1B6 IO DIFFIO_RX138n AM2 LOW B6 VREF1B6 IO DIFFIO_RX138p AM1 LOW B6 VREF1B6 VREF1B6 W10 AB8 AF11 B6 VREF1B6 IO DIFFIO_TX137n AC6 AC5 AK6 HIGH B6 VREF1B6 IO DIFFIO_TX137p AB6 AC6 AK5 HIGH B6 VREF1B6 IO DIFFIO_TX136n AF5 AC7 AJ5 HIGH B6 VREF1B6 IO DIFFIO_TX136p AG5 AC8 AJ6 HIGH B6 VREF1B6 IO DIFFIO_RX135n AH2 LOW B6 VREF1B6 IO DIFFIO_RX135p AH1 LOW B6 VREF1B6 IO DIFFIO_TX135n AD5 AB7 AH5 HIGH B6 VREF1B6 IO DIFFIO_TX135p AE5 AB6 AH6 HIGH B6 VREF1B6 IO DIFFIO_RX136n AG5 LOW B6 VREF1B6 IO DIFFIO_RX136p AH4 LOW B6 VREF1B6 IO DIFFIO_TX134n AC5 AA6 AG6 HIGH B6 VREF1B6 IO DIFFIO_TX134p AB5 AA7 AG5 HIGH B6 VREF1B6 IO DIFFIO_RX134n AG7 LOW B6 VREF1B6 IO DIFFIO_RX134p AG8 LOW B6 VREF1B6 IO DIFFIO_TX133n AA6 AA9 AF8 HIGH B6 VREF1B6 IO DIFFIO_TX133p Y6 AA8 AF7 HIGH B6 VREF1B6 IO DIFFIO_RX133n AF4 AG4 AL4 HIGH B6 VREF1B6 IO DIFFIO_RX133p AE4 AG3 AL3 HIGH B6 VREF2B6 IO DIFFIO_TX132n Y9 Y5 AF6 HIGH B6 VREF2B6 IO DIFFIO_TX132p W9 Y6 AF5 HIGH B6 VREF2B6 IO DIFFIO_RX132n AD4 AG1 AK4 HIGH B6 VREF2B6 IO DIFFIO_RX132p AC4 AG2 AK3 HIGH B6 VREF2B6 IO DIFFIO_TX131n Y8 Y7 AE8 HIGH B6 VREF2B6 IO DIFFIO_TX131p W8 Y8 AE7 HIGH B6 VREF2B6 IO DIFFIO_RX131n AG3 AF4 AK1 HIGH B6 VREF2B6 IO DIFFIO_RX131p AH3 AF3 AK2 HIGH B6 VREF2B6 IO DIFFIO_TX130n AA5 W5 AE6 HIGH B6 VREF2B6 IO DIFFIO_TX130p Y5 W6 AE5 HIGH B6 VREF2B6 IO DIFFIO_RX130n AF3 AF2 AJ4 HIGH B6 VREF2B6 IO DIFFIO_RX130p AE3 AF1 AJ3 HIGH B6 VREF2B6 IO DIFFIO_TX129n Y7 Y10 AD10 HIGH B6 VREF2B6 IO DIFFIO_TX129p W7 Y9 AD9 HIGH B6 VREF2B6 IO DIFFIO_RX129n AD3 AE4 AJ2 HIGH B6 VREF2B6 IO DIFFIO_RX129p AC3 AE3 AJ1 HIGH B6 VREF2B6 IO DIFFIO_TX128n U7 W10 AD8 HIGH B6 VREF2B6 IO DIFFIO_TX128p V7 W9 AD7 HIGH B6 VREF2B6 IO DIFFIO_RX128n AH2 AE2 AH4 HIGH B6 VREF2B6 IO DIFFIO_RX128p AG2 AE1 AH3 HIGH B6 VREF2B6 VREF2B6 Y10 AA10 AG11 B6 VREF2B6 IO DIFFIO_TX127n W6 V9 AD5 HIGH B6 VREF2B6 IO DIFFIO_TX127p V6 V10 AD6 HIGH B6 VREF2B6 IO DIFFIO_RX127n AE2 AC3 AH1 HIGH B6 VREF2B6 IO DIFFIO_RX127p AF2 AC4 AH2 HIGH B6 VREF2B6 IO DIFFIO_TX126n U6 V5 AC5 HIGH B6 VREF2B6 IO DIFFIO_TX126p T6 V6 AC6 HIGH B6 VREF2B6 IO DIFFIO_RX126n AD2 AD3 AG4 HIGH B6 VREF2B6 IO DIFFIO_RX126p AC2 AD4 AG3 HIGH B6 VREF2B6 IO DIFFIO_TX125n W5 V8 AC7 HIGH B6 VREF2B6 IO DIFFIO_TX125p V5 V7 AC8 HIGH B6 VREF2B6 IO DIFFIO_RX125n AF1 AD2 AG2 HIGH B6 VREF2B6 IO DIFFIO_RX125p AE1 AD1 AF2 HIGH B6 VREF2B6 IO DIFFIO_TX124n T5 W8 AB5 HIGH B6 VREF2B6 IO DIFFIO_TX124p U5 W7 AB6 HIGH B6 VREF2B6 IO DIFFIO_RX124n AD1 AC2 AF1 HIGH B6 VREF2B6 IO DIFFIO_RX124p AC1 AB1 AE2 HIGH B6 VREF2B6 IO DIFFIO_TX123n AB9 AC11 LOW B6 VREF2B6 IO DIFFIO_TX123p AC10 AC12 LOW B6 VREF2B6 IO DIFFIO_RX123n/RDN6 AB4 AA4 AF4 HIGH B6 VREF2B6 IO DIFFIO_RX123p/RUP6 AB3 AA5 AF3 HIGH B6 VREF3B6 IO DIFFIO_TX122n AB10 AC9 LOW B6 VREF3B6 IO DIFFIO_TX122p AA11 AC10 LOW B6 VREF3B6 IO DIFFIO_RX122n Y4 AB3 AE4 HIGH B6 VREF3B6 IO DIFFIO_RX122p AA4 AB2 AE3 HIGH B6 VREF3B6 IO DIFFIO_TX121n Y11 AC14 LOW B6 VREF3B6 IO DIFFIO_TX121p Y12 AB14 LOW B6 VREF3B6 IO DIFFIO_RX121n W4 AA3 AD4 HIGH B6 VREF3B6 IO DIFFIO_RX121p V4 AA2 AD3 HIGH B6 VREF3B6 IO DIFFIO_TX120n W11 AB13 LOW B6 VREF3B6 IO DIFFIO_TX120p W12 AB12 LOW B6 VREF3B6 IO DIFFIO_RX120n AA3 Y4 AD2 HIGH B6 VREF3B6 IO DIFFIO_RX120p Y3 Y3 AD1 HIGH B6 VREF3B6 IO DIFFIO_TX119n AB10 LOW B6 VREF3B6 IO DIFFIO_TX119p AB11 LOW B6 VREF3B6 IO DIFFIO_RX119n W3 Y2 AC4 HIGH B6 VREF3B6 IO DIFFIO_RX119p V3 Y1 AC3 HIGH B6 VREF3B6 IO DIFFIO_TX118n AB8 LOW B6 VREF3B6 IO DIFFIO_TX118p AB9 LOW B6 VREF3B6 IO DIFFIO_RX118n AB2 W4 AC2 HIGH B6 VREF3B6 IO DIFFIO_RX118p AA2 W3 AC1 HIGH B6 VREF3B6 VREF3B6 AA10 V12 AH11 B6 VREF3B6 IO DIFFIO_TX117n AA12 LOW B6 VREF3B6 IO DIFFIO_TX117p AA13 LOW B6 VREF3B6 IO DIFFIO_RX117n Y2 W2 AB4 HIGH B6 VREF3B6 IO DIFFIO_RX117p W2 W1 AB3 HIGH B6 VREF3B6 IO DIFFIO_TX116n AA11 LOW B6 VREF3B6 IO DIFFIO_TX116p AA10 LOW B6 VREF3B6 IO DIFFIO_RX116n AA1 V4 AB1 HIGH B6 VREF3B6 IO DIFFIO_RX116p AB1 V3 AB2 HIGH B6 VREF3B6 IO DIFFIO_TX115n AA9 LOW B6 VREF3B6 IO DIFFIO_TX115p AA8 LOW B6 VREF3B6 IO DIFFIO_RX115n V2 V2 AA4 HIGH B6 VREF3B6 IO DIFFIO_RX115p U2 V1 AA3 HIGH B6 VREF3B6 IO DIFFIO_TX114n AB7 LOW B6 VREF3B6 IO DIFFIO_TX114p AA6 LOW B6 VREF3B6 IO DIFFIO_RX114n V1 U5 AA2 HIGH B6 VREF3B6 IO DIFFIO_RX114p U1 U6 AA1 HIGH B6 VREF3B6 IO CLK8n U4 U3 Y5 B6 VREF3B6 CLK8p U3 U4 Y6 B6 VREF3B6 CLK9n T3 U1 Y2 B6 VREF3B6 CLK9p T4 U2 Y1 GNDG_PLL3 V9 U11 Y11 VCCG_PLL3 U9 V11 Y12 GNDA_PLL3 V8 U7 Y9 GND VCCA_PLL3 U8 U8 W8 GNDG_PLL4 R9 U9 W11 VCCG_PLL4 R10 T9 W12 GNDA_PLL4 R8 T7 W9 GND VCCA_PLL4 T8 T8 W10 B5 VREF0B5 CLK10p T1 T6 Y3 B5 VREF0B5 IO CLK10n T2 T5 Y4 B5 VREF0B5 CLK11p R3 T4 W5 B5 VREF0B5 CLK11n R4 T3 W6 B5 VREF0B5 IO DIFFIO_TX113n Y7 LOW B5 VREF0B5 IO DIFFIO_TX113p W7 LOW B5 VREF0B5 IO DIFFIO_RX113n R1 T2 W1 HIGH B5 VREF0B5 IO DIFFIO_RX113p P1 T1 W2 HIGH B5 VREF0B5 IO DIFFIO_TX112n AA14 LOW B5 VREF0B5 IO DIFFIO_TX112p Y14 LOW B5 VREF0B5 IO DIFFIO_RX112n P2 R1 W4 HIGH B5 VREF0B5 IO DIFFIO_RX112p R2 R2 W3 HIGH B5 VREF0B5 IO DIFFIO_TX111n W13 LOW B5 VREF0B5 IO DIFFIO_TX111p Y13 LOW B5 VREF0B5 IO DIFFIO_RX111n K1 R3 V1 HIGH B5 VREF0B5 IO DIFFIO_RX111p L1 R4 V2 HIGH B5 VREF0B5 IO DIFFIO_TX110n W14 LOW B5 VREF0B5 IO DIFFIO_TX110p V14 LOW B5 VREF0B5 IO DIFFIO_RX110n N2 P1 V3 HIGH B5 VREF0B5 IO DIFFIO_RX110p M2 P2 V4 HIGH B5 VREF0B5 VREF0B5 L10 R12 M11 B5 VREF0B5 IO DIFFIO_TX109n V7 LOW B5 VREF0B5 IO DIFFIO_TX109p V8 LOW B5 VREF0B5 IO DIFFIO_RX109n L2 P3 U1 HIGH B5 VREF0B5 IO DIFFIO_RX109p K2 P4 U2 HIGH B5 VREF0B5 IO DIFFIO_TX108n V9 LOW B5 VREF0B5 IO DIFFIO_TX108p V10 LOW B5 VREF0B5 IO DIFFIO_RX108n P3 N1 U3 HIGH B5 VREF0B5 IO DIFFIO_RX108p N3 N2 U4 HIGH B5 VREF0B5 IO DIFFIO_TX107n V11 LOW B5 VREF0B5 IO DIFFIO_TX107p V12 LOW B5 VREF0B5 IO DIFFIO_RX107n L3 N3 T2 HIGH B5 VREF0B5 IO DIFFIO_RX107p M3 N4 T1 HIGH B5 VREF0B5 IO DIFFIO_TX106n U13 LOW B5 VREF0B5 IO DIFFIO_TX106p V13 LOW B5 VREF0B5 IO DIFFIO_RX106n P4 M2 T3 HIGH B5 VREF0B5 IO DIFFIO_RX106p N4 M3 T4 HIGH B5 VREF0B5 IO DIFFIO_TX105n T11 U9 LOW B5 VREF0B5 IO DIFFIO_TX105p R11 U10 LOW B5 VREF0B5 IO DIFFIO_RX105n M4 L2 R3 HIGH B5 VREF0B5 IO DIFFIO_RX105p L4 L3 R4 HIGH B5 VREF1B5 IO DIFFIO_TX104n P11 U12 LOW B5 VREF1B5 IO DIFFIO_TX104p N11 U11 LOW B5 VREF1B5 IO DIFFIO_RX104n/RDN5 K3 M4 P3 HIGH B5 VREF1B5 IO DIFFIO_RX104p/RUP5 K4 M5 P4 HIGH B5 VREF1B5 IO DIFFIO_TX103n R7 R7 V6 HIGH B5 VREF1B5 IO DIFFIO_TX103p T7 R8 V5 HIGH B5 VREF1B5 IO DIFFIO_RX103n J1 L1 R2 HIGH B5 VREF1B5 IO DIFFIO_RX103p H1 K2 P1 HIGH B5 VREF1B5 IO DIFFIO_TX102n P8 P7 U8 HIGH B5 VREF1B5 IO DIFFIO_TX102p N8 P8 U7 HIGH B5 VREF1B5 IO DIFFIO_RX102n G1 J2 P2 HIGH B5 VREF1B5 IO DIFFIO_RX102p F1 J1 N2 HIGH B5 VREF1B5 IO DIFFIO_TX101n R6 R5 U6 HIGH B5 VREF1B5 IO DIFFIO_TX101p P6 R6 U5 HIGH B5 VREF1B5 IO DIFFIO_RX101n H2 K4 N4 HIGH B5 VREF1B5 IO DIFFIO_RX101p J2 K3 N3 HIGH B5 VREF1B5 IO DIFFIO_TX100n P9 R10 T5 HIGH B5 VREF1B5 IO DIFFIO_TX100p N9 R9 T6 HIGH B5 VREF1B5 IO DIFFIO_RX100n G2 J3 M1 HIGH B5 VREF1B5 IO DIFFIO_RX100p F2 J4 M2 HIGH B5 VREF1B5 VREF1B5 M10 L8 N11 B5 VREF1B5 IO DIFFIO_TX99n P7 P6 T7 HIGH B5 VREF1B5 IO DIFFIO_TX99p N7 P5 T8 HIGH B5 VREF1B5 IO DIFFIO_RX99n J3 H1 M3 HIGH B5 VREF1B5 IO DIFFIO_RX99p H3 H2 M4 HIGH B5 VREF1B5 IO DIFFIO_TX98n N6 N7 T9 HIGH B5 VREF1B5 IO DIFFIO_TX98p M6 N8 T10 HIGH B5 VREF1B5 IO DIFFIO_RX98n G3 G1 L1 HIGH B5 VREF1B5 IO DIFFIO_RX98p F3 G2 L2 HIGH B5 VREF1B5 IO DIFFIO_TX97n R5 P9 R5 HIGH B5 VREF1B5 IO DIFFIO_TX97p P5 P10 R6 HIGH B5 VREF1B5 IO DIFFIO_RX97n J4 H3 L3 HIGH B5 VREF1B5 IO DIFFIO_RX97p H4 H4 L4 HIGH B5 VREF1B5 IO DIFFIO_TX96n M5 N5 R8 HIGH B5 VREF1B5 IO DIFFIO_TX96p N5 N6 R7 HIGH B5 VREF1B5 IO DIFFIO_RX96n G4 F1 K2 HIGH B5 VREF1B5 IO DIFFIO_RX96p F4 F2 K1 HIGH B5 VREF1B5 IO DIFFIO_TX95n M8 N10 P5 HIGH B5 VREF1B5 IO DIFFIO_TX95p L8 N9 P6 HIGH B5 VREF1B5 IO DIFFIO_RX95n E2 G3 K3 HIGH B5 VREF1B5 IO DIFFIO_RX95p D2 G4 K4 HIGH B5 VREF2B5 IO DIFFIO_TX94n M7 M8 P7 HIGH B5 VREF2B5 IO DIFFIO_TX94p L7 M9 P8 HIGH B5 VREF2B5 IO DIFFIO_RX94n E3 F3 J3 HIGH B5 VREF2B5 IO DIFFIO_RX94p D3 F4 J4 HIGH B5 VREF2B5 IO DIFFIO_TX93n L5 M6 N5 HIGH B5 VREF2B5 IO DIFFIO_TX93p K5 M7 N6 HIGH B5 VREF2B5 IO DIFFIO_RX93n E2 LOW B5 VREF2B5 IO DIFFIO_RX93p E1 LOW B5 VREF2B5 IO DIFFIO_TX92n H5 L6 N8 HIGH B5 VREF2B5 IO DIFFIO_TX92p J5 L7 N7 HIGH B5 VREF2B5 IO DIFFIO_RX92n F5 LOW B5 VREF2B5 IO DIFFIO_RX92p E4 LOW B5 VREF2B5 IO DIFFIO_TX91n F5 K5 M6 HIGH B5 VREF2B5 IO DIFFIO_TX91p G5 K6 M5 HIGH B5 VREF2B5 IO DIFFIO_TX90n L6 K8 L5 HIGH B5 VREF2B5 IO DIFFIO_TX90p K6 K7 L6 HIGH B5 VREF2B5 VREF2B5 N10 F6 P11 B5 VREF2B5 IO DIFFIO_TX89n J6 J5 M7 HIGH B5 VREF2B5 IO DIFFIO_TX89p H6 J6 M8 HIGH B5 VREF2B5 IO DIFFIO_RX89n H2 LOW B5 VREF2B5 IO DIFFIO_RX89p H1 LOW B5 VREF2B5 IO DIFFIO_TX88n G6 J7 K5 HIGH B5 VREF2B5 IO DIFFIO_TX88p F6 J8 K6 HIGH B5 VREF2B5 IO DIFFIO_RX88n G2 LOW B5 VREF2B5 IO DIFFIO_RX88p G1 LOW B5 VREF2B5 IO DIFFIO_TX87n K8 H5 L8 HIGH B5 VREF2B5 IO DIFFIO_TX87p J8 H6 L7 HIGH B5 VREF2B5 IO DIFFIO_RX87n F1 LOW B5 VREF2B5 IO DIFFIO_RX87p F2 LOW B5 VREF2B5 IO DIFFIO_TX86n K7 H8 K7 HIGH B5 VREF2B5 IO DIFFIO_TX86p J7 H7 K8 HIGH B5 VREF2B5 IO DIFFIO_RX86n E1 LOW B5 VREF2B5 IO DIFFIO_RX86p E2 LOW B5 VREF2B5 IO DIFFIO_TX85n H7 G6 J7 HIGH B5 VREF2B5 IO DIFFIO_TX85p G7 G5 J8 HIGH B5 VREF2B5 IO DIFFIO_RX85n D1 LOW B5 VREF2B5 IO DIFFIO_RX85p D2 LOW B5 VREF3B5 IO DIFFIO_TX84n G8 G7 M9 HIGH B5 VREF3B5 IO DIFFIO_TX84p H8 G8 M10 HIGH B5 VREF3B5 IO DIFFIO_RX84n H3 LOW B5 VREF3B5 IO DIFFIO_RX84p H4 LOW B5 VREF3B5 IO DIFFIO_TX83n R10 LOW B5 VREF3B5 IO DIFFIO_TX83p R9 LOW B5 VREF3B5 IO DIFFIO_RX83n G4 LOW B5 VREF3B5 IO DIFFIO_RX83p G3 LOW B5 VREF3B5 IO DIFFIO_TX82n P10 LOW B5 VREF3B5 IO DIFFIO_TX82p P9 LOW B5 VREF3B5 IO DIFFIO_RX82n F3 LOW B5 VREF3B5 IO DIFFIO_RX82p F4 LOW B5 VREF3B5 IO DIFFIO_TX81n N9 LOW B5 VREF3B5 IO DIFFIO_TX81p N10 LOW B5 VREF3B5 IO DIFFIO_RX81n E3 LOW B5 VREF3B5 IO DIFFIO_RX81p E4 LOW B5 VREF3B5 IO DIFFIO_TX80n T13 LOW B5 VREF3B5 IO DIFFIO_TX80p U14 LOW B5 VREF3B5 IO DIFFIO_RX80n C2 LOW B5 VREF3B5 IO DIFFIO_RX80p D3 LOW B5 VREF3B5 VREF3B5 P10 R11 B5 VREF3B5 IO DIFFIO_TX79n T11 LOW B5 VREF3B5 IO DIFFIO_TX79p T12 LOW B5 VREF3B5 IO DIFFIO_RX79n J5 LOW B5 VREF3B5 IO DIFFIO_RX79p J6 LOW B5 VREF3B5 IO DIFFIO_TX78n R13 LOW B5 VREF3B5 IO DIFFIO_TX78p R12 LOW B5 VREF3B5 IO DIFFIO_RX78n H6 LOW B5 VREF3B5 IO DIFFIO_RX78p H5 LOW B5 VREF3B5 IO DIFFIO_TX77n R14 LOW B5 VREF3B5 IO DIFFIO_TX77p T14 LOW B5 VREF3B5 IO DIFFIO_RX77n G5 LOW B5 VREF3B5 IO DIFFIO_RX77p G6 LOW B5 VREF3B5 IO DIFFIO_TX76n N12 LOW B5 VREF3B5 IO DIFFIO_TX76p P12 LOW B5 VREF3B5 IO DIFFIO_RX76n F5 LOW B5 VREF3B5 IO DIFFIO_RX76p F6 LOW B5 VREF3B5 IO P13 B5 VREF3B5 IO P14 B5 VREF3B5 FPLL10CLKn D1 L5 J1 B5 VREF3B5 FPLL10CLKp E1 L4 J2 GNDG_PLL10 K9 E3 L9 VCCG_PLL10 J9 D3 L10 GNDA_PLL10 M9 D1 K9 GND VCCA_PLL10 L9 D2 J9 B4 VREF0B4 IO B3 B4 VREF0B4 IO D4 B4 VREF0B4 IO C2 M10 G8 B4 VREF0B4 IO G7 B4 VREF0B4 IO E5 B4 VREF0B4 IO C4 B4 VREF0B4 IO G9 B4 VREF0B4 IO H9 B4 VREF0B4 IO E5 K9 E6 B4 VREF0B4 IO DQ0T0 C4 D5 C6 DQ0T0 DQ0T0 B4 VREF0B4 IO L9 J10 B4 VREF0B4 IO DQ0T1 C5 C3 B6 DQ0T1 DQ0T1 B4 VREF0B4 IO F8 M11 D6 B4 VREF0B4 IO DQ0T2 D5 E5 C7 DQ0T2 DQ0T2 B4 VREF0B4 IO D4 F7 F8 B4 VREF0B4 IO DQS0T B4 C5 B7 B4 VREF0B4 IO E4 L10 F7 B4 VREF0B4 VREF0B4 K10 E6 L11 B4 VREF0B4 IO DQ0T3 B5 C4 A7 DQ0T3 DQ0T3 B4 VREF0B4 IO D7 B4 VREF0B4 IO DQ0T4 B3 D4 C8 DQ0T4 DQ0T4 B4 VREF0B4 IO F7 K10 E7 B4 VREF0B4 IO DQ0T5 C3 A4 A6 DQ0T5 DQ0T5 B4 VREF0B4 IO H9 J9 D5 B4 VREF0B4 IO DQ0T6 A5 B4 A8 DQ0T6 DQ0T6 B4 VREF0B4 IO F8 F9 B4 VREF0B4 IO DQ0T7 A4 B3 B8 DQ0T7 DQ0T7 B4 VREF0B4 IO G9 H9 C5 B4 VREF0B4 IO K11 B4 VREF0B4 IO J11 B4 VREF1B4 IO G10 B4 VREF1B4 IO B5 B4 VREF1B4 IO B4 B4 VREF1B4 IO J12 B4 VREF1B4 IO K12 B4 VREF1B4 IO DQ1T0 E6 D6 C9 DQ0T8 DQ0T8 B4 VREF1B4 IO F9 F10 B4 VREF1B4 IO DQ1T1 C7 C6 B9 DQ0T9 DQ0T9 B4 VREF1B4 IO E7 G9 E8 B4 VREF1B4 IO DQ1T2 D7 B5 A9 DQ0T10 DQ0T10 B4 VREF1B4 IO H11 B4 VREF1B4 IO DQS1T C6 E7 B10 DQS0T B4 VREF1B4 IO F9 L11 G11 B4 VREF1B4 IO DQ1T3 A6 C7 C11 DQ0T11 DQ0T11 B4 VREF1B4 IO H10 H10 A4 B4 VREF1B4 IO DQ1T4 B6 A5 A10 DQ0T12 DQ0T12 B4 VREF1B4 IO J10 K13 B4 VREF1B4 IO DQ1T5 D6 D7 C10 DQ0T13 DQ0T13 B4 VREF1B4 VREF1B4 K11 E8 L12 B4 VREF1B4 IO E9 F10 A5 B4 VREF1B4 IO DQ1T6 A7 A6 A11 DQ0T14 DQ0T14 B4 VREF1B4 IO G10 G10 J13 B4 VREF1B4 IO DQ1T7 B7 B6 B11 DQ0T15 DQ0T15 B4 VREF1B4 IO J10 K11 M12 B4 VREF1B4 IO H12 B4 VREF1B4 IO F11 B4 VREF1B4 IO H13 B4 VREF1B4 IO D8 B4 VREF1B4 IO E10 B4 VREF1B4 IO M13 B4 VREF1B4 IO E9 B4 VREF2B4 IO DQ2T0 B8 B7 A12 DQ1T0 DQ0T16 B4 VREF2B4 IO L12 D10 B4 VREF2B4 IO DQ2T1 D9 D8 D12 DQ1T1 DQ0T17 B4 VREF2B4 IO G11 H11 J14 B4 VREF2B4 IO DQ2T2 E8 B8 E12 DQ1T2 DQ0T18 B4 VREF2B4 IO J11 D9 B4 VREF2B4 IO DQS2T C8 A7 C12 DQS0T B4 VREF2B4 IO G12 G13 B4 VREF2B4 IO DQ2T3 C9 E9 E13 DQ1T3 DQ0T19 B4 VREF2B4 IO H11 F11 G12 B4 VREF2B4 IO DQ2T4 D8 A8 B12 DQ1T4 DQ0T20 B4 VREF2B4 IO G11 K14 B4 VREF2B4 IO DQ2T5 A9 C9 B13 DQ1T5 DQ0T21 B4 VREF2B4 IO F13 B4 VREF2B4 IO DQ2T6 B9 C8 C13 DQ1T6 DQ0T22 B4 VREF2B4 IO J11 K12 F12 B4 VREF2B4 IO DQ2T7 A8 D9 D13 DQ1T7 DQ0T23 B4 VREF2B4 IO N13 B4 VREF2B4 VREF2B4 K12 E10 L13 B4 VREF2B4 IO FCLK6 F10 G12 D11 B4 VREF2B4 IO FCLK7 F11 A14 G14 B4 VREF2B4 IO E11 B4 VREF2B4 IO H14 B4 VREF2B4 IO M14 B4 VREF2B4 IO N14 B4 VREF2B4 IO F14 B4 VREF2B4 IO DQ3T0 B10 E11 C14 DQ1T8 DQ0T24 B4 VREF2B4 IO H12 J15 B4 VREF2B4 IO DQ3T1 D10 B9 D14 DQ1T9 DQ0T25 B4 VREF2B4 IO L11 J12 K15 B4 VREF2B4 IO DQ3T2 E10 D10 E14 DQ1T10 DQ0T26 B4 VREF3B4 IO H12 F12 H15 B4 VREF3B4 IO DQS3T C10 D11 C15 DQS1T B4 VREF3B4 IO K13 M15 B4 VREF3B4 IO DQ3T3 D11 C10 A14 DQ1T11 DQ0T27 B4 VREF3B4 IO J12 N15 B4 VREF3B4 IO DQ3T4 E11 A9 B14 DQ1T12 DQ0T28 B4 VREF3B4 IO G13 H13 G15 B4 VREF3B4 IO DQ3T5 B11 B11 B15 DQ1T13 DQ0T29 B4 VREF3B4 IO L14 P15 B4 VREF3B4 IO DQ3T6 C11 C11 E15 DQ1T14 DQ0T30 B4 VREF3B4 IO DEV_OE F12 L13 P16 B4 VREF3B4 IO DQ3T7 A10 B10 D15 DQ1T15 DQ0T31 B4 VREF3B4 IO RUP4 F13 G13 F15 B4 VREF3B4 IO RDN4 E14 J13 E16 B4 VREF3B4 IO L16 B4 VREF3B4 IO J16 B4 VREF3B4 IO M16 B4 VREF3B4 IO K16 B4 VREF3B4 VREF3B4 K13 E12 L14 B4 VREF3B4 IO G16 B4 VREF3B4 IO L12 B14 H16 B4 VREF3B4 IO DQ4T0 D12 A11 A16 B4 VREF3B4 IO nWS F14 D14 F16 B4 VREF3B4 IO DQ4T1 E12 B12 D16 B4 VREF3B4 IO N16 B4 VREF3B4 IO DQ4T2 A12 C12 A17 B4 VREF3B4 IO H13 F13 F17 B4 VREF3B4 IO DQS4T C12 D12 C16 B4 VREF3B4 IO DATA0 E15 E14 M17 B4 VREF3B4 IO DQ4T3 B12 C13 B16 B4 VREF3B4 IO K14 P17 B4 VREF4B4 IO DQ4T4 C13 D13 B17 B4 VREF4B4 IO G14 H14 H17 B4 VREF4B4 IO DQ4T5 D13 E13 D17 B4 VREF4B4 IO DATA1 C16 F14 J17 B4 VREF4B4 IO DQ4T6 E13 A13 E17 B4 VREF4B4 IO J14 K17 B4 VREF4B4 IO DQ4T7 B13 B13 C17 B4 VREF4B4 IO J13 C14 C18 B4 VREF4B4 IO G17 B4 VREF4B4 IO P18 B4 VREF4B4 IO L17 B4 VREF4B4 IO N17 B4 VREF4B4 IO D18 B4 VREF4B4 IO F18 B4 VREF4B4 IO L14 L15 E18 B4 VREF4B4 IO L18 B4 VREF4B4 IO N18 B4 VREF4B4 IO M18 B4 VREF4B4 VREF4B4 K14 L15 B4 VREF4B4 IO G18 B4 VREF4B4 IO H18 B4 VREF4B4 IO L16 K15 J18 B4 VREF4B4 IO DATA2 F15 F15 K18 B4 VREF4B4 IO P19 B4 VREF4B4 IO N19 B4 VREF4B4 TMS TMS D16 E15 F19 B4 VREF4B4 TRST TRST G15 G15 H19 B4 VREF4B4 TCK TCK F16 G14 E20 B4 VREF4B4 IO DATA3 G17 C16 P21 B4 VREF4B4 IO P20 B4 VREF4B4 IO J15 N20 B4 VREF4B4 TDI TDI E16 D16 F20 B4 VREF4B4 TDO TDO G16 F16 G20 B4 VREF4B4 IO CLK12n B14 A15 A18 B4 VREF4B4 CLK12p A14 B15 B18 B4 VREF4B4 IO CLK13n/PLL11_OUT D14 C15 C19 B4 VREF4B4 CLK13p C14 D15 D19 VCCA_PLL11 J14 E16 K19 GND GNDA_PLL11 H14 E17 J19 VCCG_PLL11 H15 H16 L19 GNDG_PLL11 J15 H15 M19 TEMPDIODEp E17 E18 F21 TEMPDIODEn F17 F18 H21 VCCA_PLL5 J17 G17 L21 GND GNDA_PLL5 H16 F17 M21 VCCG_PLL5 K15 J16 L20 GNDG_PLL5 K17 L16 M20 B9 VCC_PLL5_OUTA L18 H17 J20 B10 VCC_PLL5_OUTB J18 L17 K21 B9 VREF0B3 IO PLL5_OUT0p B16 B16 C21 B9 VREF0B3 IO PLL5_OUT0n A16 A16 D21 B9 VREF0B3 IO PLL5_OUT1p B15 B17 C20 B9 VREF0B3 IO PLL5_OUT1n A15 A17 D20 B9 VREF0B3 IO PLL5_FBp D15 D17 B19 B9 VREF0B3 IO PLL5_FBn C15 C17 A19 B10 VREF0B3 IO PLL5_OUT2p D17 B18 B21 B10 VREF0B3 IO PLL5_OUT2n C17 A18 A21 B10 VREF0B3 IO PLL5_OUT3p B17 D18 A20 B10 VREF0B3 IO PLL5_OUT3n A17 C18 B20 B3 VREF0B3 nSTATUS nSTATUS E18 G16 N21 B3 VREF0B3 nCONFIG nCONFIG F19 J18 L22 B3 VREF0B3 DCLK DCLK F18 E19 G21 B3 VREF0B3 CONF_DONE CONF_DONE G18 G18 H22 B3 VREF0B3 CLK14p A18 A19 B22 B3 VREF0B3 IO CLK14n B18 B19 A22 B3 VREF0B3 CLK15p C18 C19 D22 B3 VREF0B3 IO CLK15n D18 D19 C22 B3 VREF0B3 VREF0B3 K18 E21 L25 B3 VREF0B3 IO E21 B3 VREF0B3 IO G22 B3 VREF0B3 IO J22 B3 VREF0B3 IO N22 B3 VREF0B3 IO M22 B3 VREF0B3 IO P22 B3 VREF0B3 IO E22 B3 VREF0B3 IO G23 B3 VREF0B3 IO L19 F19 F22 B3 VREF0B3 IO DATA4 G19 G19 L23 B3 VREF0B3 IO N23 B3 VREF0B3 IO DQ5T0 B19 A20 B23 B3 VREF0B3 IO J19 K18 H23 B3 VREF0B3 IO DQ5T1 C19 B20 E23 B3 VREF0B3 IO DATA5 F20 J19 J23 B3 VREF0B3 IO DQ5T2 D19 C20 D23 B3 VREF0B3 IO L18 K23 B3 VREF0B3 IO DQS5T C20 D20 C23 B3 VREF1B3 IO H19 H19 F23 B3 VREF1B3 IO DQ5T3 E19 E20 A23 B3 VREF1B3 IO DATA6 F21 K19 E24 B3 VREF1B3 IO DQ5T4 A20 B21 A24 B3 VREF1B3 IO H20 M23 B3 VREF1B3 IO DQ5T5 B20 C21 B24 B3 VREF1B3 IO H20 F20 F24 B3 VREF1B3 IO DQ5T6 D20 D21 C24 B3 VREF1B3 IO G24 B3 VREF1B3 IO DQ5T7 E20 A22 D24 B3 VREF1B3 IO J20 G20 K24 B3 VREF1B3 IO N24 B3 VREF1B3 VREF1B3 K19 L26 B3 VREF1B3 IO H24 B3 VREF1B3 IO F25 B3 VREF1B3 IO J24 B3 VREF1B3 IO L24 B3 VREF1B3 IO RUP3 F22 F21 P23 B3 VREF1B3 IO RDN3 F24 L19 M24 B3 VREF1B3 IO DQ6T0 B21 B22 B25 DQ2T0 DQ1T0 B3 VREF1B3 IO G25 B3 VREF1B3 IO DQ6T1 C21 C22 E25 DQ2T1 DQ1T1 B3 VREF1B3 IO DATA7 G20 J20 P25 B3 VREF1B3 IO DQ6T2 A22 B23 D25 DQ2T2 DQ1T2 B3 VREF1B3 IO K20 P24 B3 VREF1B3 IO DQS6T C22 D22 C25 DQS2T B3 VREF1B3 IO G21 H25 B3 VREF1B3 IO DQ6T3 D21 C23 A26 DQ2T3 DQ1T3 B3 VREF1B3 IO CLKUSR F23 H21 J25 B3 VREF1B3 IO DQ6T4 E21 A24 B26 DQ2T4 DQ1T4 B3 VREF1B3 IO L20 N25 B3 VREF2B3 IO DQ6T5 B22 E22 C26 DQ2T5 DQ1T5 B3 VREF2B3 IO F26 B3 VREF2B3 IO DQ6T6 D22 B24 D26 DQ2T6 DQ1T6 B3 VREF2B3 IO J21 G27 B3 VREF2B3 IO DQ6T7 E22 D23 E26 DQ2T7 DQ1T7 B3 VREF2B3 IO K25 B3 VREF2B3 IO FCLK0 E23 F22 G26 B3 VREF2B3 IO FCLK1 E25 G22 D29 B3 VREF2B3 IO H26 B3 VREF2B3 IO D30 B3 VREF2B3 IO M25 B3 VREF2B3 IO N26 B3 VREF2B3 VREF2B3 K20 E23 L27 B3 VREF2B3 IO F27 B3 VREF2B3 IO DQ7T0 A23 D24 B27 DQ2T8 DQ1T8 B3 VREF2B3 IO K21 E29 B3 VREF2B3 IO DQ7T1 B23 A25 C27 DQ2T9 DQ1T9 B3 VREF2B3 IO L21 M26 B3 VREF2B3 IO DQ7T2 A24 C24 D27 DQ2T10 DQ1T10 B3 VREF2B3 IO L21 F28 B3 VREF2B3 IO DQS7T C24 B26 C28 DQS1T B3 VREF2B3 IO H21 F29 B3 VREF2B3 IO DQ7T3 C23 B25 E27 DQ2T11 DQ1T11 B3 VREF2B3 IO J21 H22 N27 B3 VREF2B3 IO DQ7T4 D24 C25 B28 DQ2T12 DQ1T12 B3 VREF2B3 IO D31 B3 VREF2B3 IO DQ7T5 B24 D25 A28 DQ2T13 DQ1T13 B3 VREF2B3 IO J22 J26 B3 VREF2B3 IO DQ7T6 D23 A26 D28 DQ2T14 DQ1T14 B3 VREF2B3 IO K26 B3 VREF2B3 IO DQ7T7 E24 E24 E28 DQ2T15 DQ1T15 B3 VREF3B3 IO H27 B3 VREF3B3 IO E30 B3 VREF3B3 IO A35 B3 VREF3B3 IO F30 B3 VREF3B3 IO M27 B3 VREF3B3 IO N28 B3 VREF3B3 IO G28 B3 VREF3B3 IO G21 F23 D32 B3 VREF3B3 IO DQ8T0 A25 C26 A29 DQ3T0 DQ1T16 B3 VREF3B3 IO J22 G23 J27 B3 VREF3B3 IO DQ8T1 C25 A28 B29 DQ3T1 DQ1T17 B3 VREF3B3 IO M28 B3 VREF3B3 VREF3B3 K21 E25 L28 B3 VREF3B3 IO DQ8T2 B25 A27 C29 DQ3T2 DQ1T18 B3 VREF3B3 IO H22 K22 H28 B3 VREF3B3 IO DQS8T C26 B27 B30 DQS3T B3 VREF3B3 IO H23 E31 B3 VREF3B3 IO DQ8T3 D25 D26 C30 DQ3T3 DQ1T19 B3 VREF3B3 IO K27 B3 VREF3B3 IO DQ8T4 A26 C27 A30 DQ3T4 DQ1T20 B3 VREF3B3 IO J23 G29 B3 VREF3B3 IO DQ8T5 B26 B28 A31 DQ3T5 DQ1T21 B3 VREF3B3 IO G22 F24 D33 B3 VREF3B3 IO DQ8T6 E26 D27 B31 DQ3T6 DQ1T22 B3 VREF3B3 IO H29 GND D28 H24 E32 B3 VREF3B3 IO DQ8T7 D26 E26 C31 DQ3T7 DQ1T23 B3 VREF3B3 IO G30 B3 VREF3B3 IO J28 B3 VREF3B3 IO B35 B3 VREF3B3 IO C35 B3 VREF3B3 IO K28 B3 VREF4B3 IO F31 B3 VREF4B3 IO B36 B3 VREF4B3 IO F25 F25 D34 B3 VREF4B3 IO DQ9T0 B27 A29 A32 DQ3T8 DQ1T24 B3 VREF4B3 IO J29 B3 VREF4B3 IO DQ9T1 C27 B29 C32 DQ3T9 DQ1T25 B3 VREF4B3 IO G23 G24 A36 B3 VREF4B3 IO DQ9T2 A27 B30 B32 DQ3T10 DQ1T26 B3 VREF4B3 IO C30 L22 F32 B3 VREF4B3 IO DQS9T B28 C28 B33 B3 VREF4B3 IO J24 K29 B3 VREF4B3 IO DQ9T3 D27 C29 A34 DQ3T11 DQ1T27 B3 VREF4B3 VREF4B3 K22 E27 L29 B3 VREF4B3 IO K23 E33 B3 VREF4B3 IO DQ9T4 A28 D29 A33 DQ3T12 DQ1T28 B3 VREF4B3 IO E27 F26 B37 B3 VREF4B3 IO DQ9T5 C28 D28 C33 DQ3T13 DQ1T29 B3 VREF4B3 IO L23 F33 B3 VREF4B3 IO DQ9T6 C29 C30 C34 DQ3T14 DQ1T30 B3 VREF4B3 IO G31 B3 VREF4B3 IO DQ9T7 B29 E28 B34 DQ3T15 DQ1T31 B3 VREF4B3 IO H23 K24 D35 B3 VREF4B3 IO H31 B3 VREF4B3 IO J30 B3 VREF4B3 IO G33 B3 VREF4B3 IO C36 B3 VREF4B3 IO E34 B3 VREF4B3 IO E28 L24 G32 B3 VREF4B3 IO D36 B3 VREF4B3 IO E35 VCCIO2 C31 C31 C39 VCCIO2 N31 C32 R39 VCCIO2 T23 M32 W35 VCCIO2 T23 V25 VCCIO2 H33 VCCIO1 U20 AA32 AA25 VCCIO1 W31 AK31 Y32 VCCIO1 AJ31 AK32 AE39 VCCIO1 U23 AU39 VCCIO1 AM33 VCCIO8 AL29 AC17 AW37 VCCIO8 AL19 AM21 AW25 VCCIO8 Y17 AM30 AR21 VCCIO8 AE22 VCCIO8 AM30 VCCIO7 AC16 AC16 AE19 VCCIO7 AL13 AM12 AM20 VCCIO7 AL3 AM3 AW15 VCCIO7 AW3 VCCIO7 AM10 VCCIO6 AJ1 AA1 AU1 VCCIO6 W1 AK1 AM7 VCCIO6 U12 AK2 AE1 VCCIO6 U10 AA5 VCCIO6 AB15 VCCIO5 T9 C1 W15 VCCIO5 N1 C2 Y8 VCCIO5 C1 M1 R1 VCCIO5 T10 H7 VCCIO5 C1 VCCIO4 A3 A12 A3 VCCIO4 A13 A3 A15 VCCIO4 J16 K16 E19 VCCIO4 R18 VCCIO4 H10 VCCIO3 M17 A21 H20 VCCIO3 A19 A30 R21 VCCIO3 A29 K17 A25 VCCIO3 A37 VCCIO3 H30 VCCINT AA12 M12 AA16 VCCINT AA14 M14 AA18 VCCINT AA20 M19 AA22 VCCINT L13 M21 AA24 VCCINT L20 N13 AB17 VCCINT M11 N15 AB19 VCCINT M13 N18 AB21 VCCINT M15 N20 AB23 VCCINT M19 P12 AB25 VCCINT M21 P14 AC16 VCCINT N12 P16 AC18 VCCINT N14 P17 AC20 VCCINT N16 P19 AC22 VCCINT N18 P21 AC24 VCCINT N20 R13 AD15 VCCINT P11 R15 AD17 VCCINT P13 R18 AD19 VCCINT P14 R20 AD21 VCCINT P15 T14 AD23 VCCINT P17 T16 AD25 VCCINT P19 T17 AE16 VCCINT P21 T19 AE18 VCCINT R12 U14 AE20 VCCINT R13 U16 AE24 VCCINT R14 U17 R16 VCCINT R18 U19 R20 VCCINT R19 V13 R22 VCCINT R20 V15 R24 VCCINT T11 V18 T15 VCCINT T13 V20 T17 VCCINT T19 W14 T19 VCCINT T21 W16 T21 VCCINT U10 W17 T23 VCCINT U14 W19 T25 VCCINT U18 Y13 U16 VCCINT U22 Y15 U18 VCCINT V11 Y18 U20 VCCINT V13 Y20 U22 VCCINT V15 U24 VCCINT V17 V15 VCCINT V19 V17 VCCINT V21 V19 VCCINT W12 V21 VCCINT W14 V23 VCCINT W16 W16 VCCINT W18 W18 VCCINT W20 W22 VCCINT Y11 W24 VCCINT Y13 Y15 VCCINT Y15 Y17 VCCINT Y19 Y23 VCCINT Y21 Y25 GND A1 A10 A13 GND A11 A2 A2 GND A2 A23 A27 GND A21 A31 A38 GND A30 AA16 AA15 GND A31 AA17 AA17 GND AA17 AC1 AA23 GND AA18 AC32 AA7 GND AB16 AD17 AB16 GND AD18 AF17 AB18 GND AK1 AL1 AB20 GND AK2 AL2 AB22 GND AK30 AL31 AB24 GND AK31 AL32 AC15 GND AL1 AM10 AC17 GND AL11 AM2 AC19 GND AL2 AM23 AC21 GND AL21 AM31 AC23 GND AL30 B1 AC25 GND AL31 B2 AD16 GND B1 B31 AD18 GND B2 B32 AD20 GND B30 H18 AD22 GND B31 J17 AD24 GND H17 K1 AE15 GND H18 K32 AE17 GND K16 M13 AE21 GND L15 M15 AE23 GND L17 M16 AE25 GND M1 M17 AG1 GND M12 M18 AG39 GND M14 M20 AK10 GND M16 N12 AK20 GND M18 N14 AK22 GND M20 N16 AK30 GND M31 N17 AL21 GND N11 N19 AM32 GND N13 N21 AM8 GND N15 P13 AN21 GND N17 P15 AU3 GND N19 P18 AU37 GND N21 P20 AV1 GND P12 R14 AV2 GND P16 R16 AV38 GND P18 R17 AV39 GND P20 R19 AW13 GND R11 T12 AW2 GND R15 T13 AW27 GND R17 T15 AW38 GND R21 T18 B1 GND T10 T20 B2 GND T12 T21 B38 GND T14 U12 B39 GND T18 U13 C3 GND T20 U15 C37 GND T22 U18 G19 GND U11 U20 H32 GND U13 U21 H8 GND U15 V14 J21 GND U17 V16 K10 GND U19 V17 K20 GND U21 V19 K22 GND V12 W13 K30 GND V14 W15 N1 GND V16 W18 N39 GND V18 W20 R15 GND V20 Y14 R17 GND W11 Y16 R19 GND W13 Y17 R23 GND W15 Y19 R25 GND W17 T16 GND W19 T18 GND W21 T20 GND Y1 T22 GND Y12 T24 GND Y14 U15 GND Y16 U17 GND Y18 U19 GND Y20 U21 GND Y31 U23 GND U25 GND V16 GND V18 GND V20 GND V22 GND V24 GND W17 GND W23 GND W25 GND W33 GND Y10 GND Y16 GND Y18 GND Y22 GND Y24 GND Y30 Note to Pin-List: 1) The wire bond and flip-chip packages will have different data rates for the high speed differential I/O channels. The following table shows the data rates as supported for each package. Package Package Type High Speed Differential I/O Channel Performance (DIFFIO Speed) Units High Low B956 flip chip 840 462 Mbps F1020 flip chip 840 462 Mbps F1508 flip chip 840 462 Mbps 2) There are some shared pins for VREF on F1020 package. The following table shows the shared pins for VREF on F1020: VREF Pin VREF0B2 VREF1B2 F27 VREF3B8 VREF4B8 AH21 VREF0B7 VREF1B7 AH12 VREF2B5 VREF3B5 F6 VREF3B4 VREF4B4 E12 VREF0B3 VREF1B3 E21