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Intel® 5400 Chipset Memory Controller Hub: Datasheet

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Intel® 5400 Chipset Memory Controller Hub: Datasheet

The Intel® 5400 chipset is designed for systems based on the Intel processors Dual- Core Intel® Xeon® Processor 5100 series, Quad-Core Intel® Xeon® Processor 5300 series, Quad-Core Intel® Xeon® Processor 5400 series, and Dual-Core Intel® Xeon® Processor 5200 series, and supports 1066 MTS, 1333 MTS and 1600 MTS FSB interfaces. The Intel® 5400 chipset contains two main components: Memory Controller Hub (MCH) for the host bridge and the I/O controller hub for the I/O subsystem. The Intel® 5400 chipset uses the Intel® 631xESB/632xESB I/O Controller Hub.

The Intel® 5400 chipset is implemented in a 90 nm P1263 silicon process and packaged in a 1520 pin FCBGA package with pins on 1.067 mm (42 mil) centers. The overall package dimensions are 42.5 mm by 42.5 mm.

The Intel® 5400 chipset platform supports the Dual-Core Intel Xeon Processor 5100 series, Quad-Core Intel Xeon Processor 5300 series, Quad-Core Intel Xeon Processor 5400 series and Dual-Core Intel Xeon Processor 5200 series (266/333 MHz) in a 771-land, FC-LGA (Flip Chip Land Grid Array) package. This package uses the matching LGA771 socket. The surface mount, LGA771 socket supports Direct Socket Loading (DSL). The Dual-Core Intel Xeon Processor 5100 series, Quad-Core Intel Xeon Processor 5300 series, Quad-Core Intel Xeon Processor 5400 series, and Dual-Core Intel Xeon Processor 5200 series return a processor signature of 0x6Fyh, 0x06Fyh, 0x06Fyh and extended CPUID 0x1067yh, respectively, where y is the stepping number, when the CPUID instruction is executed with EAX=1.

Note: Unless otherwise specified, the term processor in this document refers jointly to the Dual-Core Intel Xeon Processor 5100 series, Quad-Core Intel Xeon Processor 5300 series, Quad-Core Intel Xeon Processor 5400 series, and Dual-Core Intel Xeon Processor 5200 series.

Read the full Intel® 5400 Chipset Memory Controller Hub Datasheet.